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White Rabbit Switch - Gateware
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White Rabbit Switch - Gateware
Commits
f1e82d35
Commit
f1e82d35
authored
May 09, 2013
by
Maciej Lipinski
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[TOP_SIM] adding HWDU to simulation
parent
de70c1ab
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4 changed files
with
263 additions
and
10 deletions
+263
-10
hwdu_regs.v
sim/regs/hwdu_regs.v
+8
-0
simdrv_hwdu.svh
sim/simdrv_hwdu.svh
+35
-0
main.sv
testbench/scb_top/main.sv
+218
-9
scb_top_sim.vhd
top/bare_top/scb_top_sim.vhd
+2
-1
No files found.
sim/regs/hwdu_regs.v
0 → 100644
View file @
f1e82d35
`define
ADDR_HWDU_CR
3'h0
`define
HWDU_CR_ADR_OFFSET 0
`define
HWDU_CR_ADR 32
'
h0000ffff
`define
HWDU_CR_RD_ERR_OFFSET 30
`define
HWDU_CR_RD_ERR 32
'
h40000000
`define
HWDU_CR_RD_EN_OFFSET 31
`define
HWDU_CR_RD_EN 32
'
h80000000
`define
ADDR_HWDU_REG_VAL 3
'
h4
sim/simdrv_hwdu.svh
0 → 100644
View file @
f1e82d35
`ifndef
__
SIMDRV_WR_HWDU
`define
__SIMDRV_WR_HWDU 1
`timescale
1
ns
/
1
ps
`include
"simdrv_defs.svh"
`include
"regs/hwdu_regs.v"
class
CSimDrv_HWDU
;
protected
CBusAccessor
m_acc
;
protected
uint64_t
m_base
;
function
new
(
CBusAccessor
acc
,
uint64_t
base
,
bit
dbg
=
0
)
;
m_acc
=
acc
;
m_base
=
base
;
endfunction
// new
task
set_tatsu
(
bit
[
15
:
0
]
addr
)
;
uint64_t
tmp
;
m_acc
.
write
(
m_base
+
`ADDR_HWDU_CR
,
`HWDU_CR_RD_EN
|
(
`HWDU_CR_ADR
&
(
addr
<<
`HWDU_CR_ADR_OFFSET
))
)
;
m_acc
.
read
(
m_base
+
`ADDR_HWDU_REG_VAL
,
tmp
,
4
)
;
$
display
(
"HWDU: raw_val: 0x%x, addr: 0%d"
,
tmp
,
addr
)
;
$
display
(
"HWDU: unused res: %d"
,
'h3FF
&
tmp
)
;
$
display
(
"HWDU: hp res: %d"
,
'h3FF
&
(
tmp
>>
10
))
;
$
display
(
"HWDU: normal res: %d"
,
'h3FF
&
(
tmp
>>
20
))
;
endtask
;
endclass
// CSimDrv_TATSU
`endif
// `ifndef __SIMDRV_TATSU_SVH
testbench/scb_top/main.sv
View file @
f1e82d35
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top/bare_top/scb_top_sim.vhd
View file @
f1e82d35
...
...
@@ -139,7 +139,8 @@ begin -- rtl
g_simulation
=>
true
,
g_without_network
=>
false
,
g_with_TRU
=>
true
,
g_with_TATSU
=>
true
)
g_with_TATSU
=>
true
,
g_with_HWDU
=>
true
)
port
map
(
sys_rst_n_i
=>
sys_rst_n_i
,
clk_startup_i
=>
clk_startup_i
,
...
...
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