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Grzegorz Daniluk authored
Conflicts: Manifest.py ip_cores/general-cores modules/wrsw_nic/nic_tx_fsm.vhd modules/wrsw_nic/nic_wbgen2_pkg.vhd modules/wrsw_nic/nic_wishbone_slave.vhd modules/wrsw_nic/wrsw_nic.vhd modules/wrsw_nic/xwrsw_nic.vhd top/bare_top/scb_top_bare.vhd top/bare_top/wrsw_components_pkg.vhd top/bare_top/wrsw_top_pkg.vhd top/scb_18ports/scb_top_synthesis.vhd
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ip_cores | ||
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top | ||
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Manifest.py | ||
README | ||
building.txt |