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Grzegorz Daniluk authored
for 8 port version generate first 4 GTXs with BUFR to reduce delay asymmetry between 8 port and 18 port version
5dec2833
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scb_top_synthesis.vhd |
for 8 port version generate first 4 GTXs with BUFR to reduce delay asymmetry between 8 port and 18 port version
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Manifest.py | Loading commit data... | |
scb_top_synthesis.ucf | Loading commit data... | |
scb_top_synthesis.vhd | Loading commit data... |