Commit 1aed354a authored by Tomasz Wlostowski's avatar Tomasz Wlostowski Committed by Alessandro Rubini

wrdev-tools: added V3 DataFlash Flasher

parent 78101d8b
*.o
./gen_fpga_image
./mch_flasher
./uboot_env
\ No newline at end of file
V3 Switch Flasher
----------------------
This is a simple flasher utility, which can be used to load the initial DataFlash
image (containing AT91Bootstrap and Barebox) or to recover the system from a broken
DF update.
The code is based on the V2 MCH flasher (although not compatibile with the V2 anymore).
Flashing instructions:
-----------------------
Connect the PC to the miniUSB connector on the SCB board (next to big JTAG IDC header)
- If there is some broken content in the DF which passess Atmel's builtin ROM checks, but doesn't boot,
short pins 3 and 4 of the DF chip (the 8-pin IC in the corner of the PCB right next to the CPU).
- Power up or reset the SCB
- Un-short pins 3 and 4 of the DF chip
- Run the flasher:
./mch_flasher name_of_the_image /dev/CDC_Device
The CDC device is usually /dev/ttyACM0.
Troubleshooting:
------------------
- File not found error: make sure the directory containing the mch_flasher binary also
contains the subdirectory "samba_applets".
- "Invalid response from applet": connect a serial port to the DBGU connector and launch the
flasher again to see what is going on. There's no easy way of passing debug messages via Atmel's
SAM-BA in USB mode.
Re-building the applets:
There are two applets used by the flasher to program the DF. One is called "extram" and it performs
the initialization of the DDR2 memory, and the other is called "dataflash" and does the actual programming.
- Go to samba_applets/isp-project/(extram/dataflash)
- Run build.sh. You may eventually need to change your cross-compiler path.
- Tested with OS-less ARM compilers (Codesourcery). Linux toolchain probably won't work due to libc
API incompatibilities.
\ No newline at end of file
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_NOR_start__ = 0x10000000;
define symbol __ICFEDIT_region_NOR_end__ = 0x1FFFFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x300000;
define symbol __ICFEDIT_region_RAM_end__ = 0x30FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_startup__ = 0x100;
define symbol __ICFEDIT_size_lowlevel__ = 0x800;
define symbol __ICFEDIT_size_vectors__ = 0x100;
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_sysstack__ = 0x60;
define symbol __ICFEDIT_size_irqstack__ = 0x60;
define symbol __ICFEDIT_size_heap__ = 0x0;
/*-Exports-*/
export symbol __ICFEDIT_region_NOR_start__;
export symbol __ICFEDIT_region_NOR_end__;
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
export symbol __ICFEDIT_size_startup__;
export symbol __ICFEDIT_size_vectors__;
export symbol __ICFEDIT_size_cstack__;
export symbol __ICFEDIT_size_sysstack__;
export symbol __ICFEDIT_size_irqstack__;
export symbol __ICFEDIT_size_heap__;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region STA_region = mem:[from __ICFEDIT_region_NOR_start__ size __ICFEDIT_size_startup__];
define region NOR_region = mem:[from __ICFEDIT_region_NOR_start__+__ICFEDIT_size_startup__ to __ICFEDIT_region_NOR_end__];
define region VEC_region = mem:[from __ICFEDIT_region_RAM_start__ size __ICFEDIT_size_vectors__];
define region OBJ_region = mem:[from __ICFEDIT_region_RAM_start__+__ICFEDIT_size_vectors__ size __ICFEDIT_size_lowlevel__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__+__ICFEDIT_size_vectors__+__ICFEDIT_size_lowlevel__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block SYS_STACK with alignment = 8, size = __ICFEDIT_size_sysstack__ { };
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { section .vectors };
initialize by copy { object board_lowlevel.o,object board_memories.o };
initialize by copy { readwrite };
do not initialize { section .noinit };
place in STA_region { section .cstartup };
place in NOR_region { readonly };
place in VEC_region { section .vectors };
place in OBJ_region { object board_lowlevel.o,object board_memories.o };
place in RAM_region { readwrite, block IRQ_STACK, block SYS_STACK, block CSTACK, block HEAP };
; * ----------------------------------------------------------------------------
; * ATMEL Microcontroller Software Support
; * ----------------------------------------------------------------------------
; * Copyright (c) 2008, Atmel Corporation
; *
; * All rights reserved.
; *
; * Redistribution and use in source and binary forms, with or without
; * modification, are permitted provided that the following conditions are met:
; *
; * - Redistributions of source code must retain the above copyright notice,
; * this list of conditions and the disclaimer below.
; *
; * Atmel's name may not be used to endorse or promote products derived from
; * this software without specific prior written permission.
; *
; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; * ----------------------------------------------------------------------------
; *------------------------------------------------------------------------------
; * Linker scatter for running in norflash on the AT91SAM9263
; *----------------------------------------------------------------------------*/
Load_region 0x10000000 0x10000000 {
Fixed_region 0x10000000 {
*(cstartup +First)
.ANY (+RO)
}
Relocate_region 0x300000 0x18000 {
*.o (VECTOR, +First)
board_lowlevel.o (+RO)
board_memories.o (+RO)
.ANY (+RW +ZI)
}
ARM_LIB_HEAP 0x312000 EMPTY 0x1000 {
}
ARM_LIB_STACK 0x318000 EMPTY -0x1000 {
}
}
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_SDRAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_SDRAM_end__ = 0x23FFFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x300000;
define symbol __ICFEDIT_region_RAM_end__ = 0x30FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_startup__ = 0x100;
define symbol __ICFEDIT_size_vectors__ = 0x100;
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_sysstack__ = 0x60;
define symbol __ICFEDIT_size_irqstack__ = 0x60;
define symbol __ICFEDIT_size_heap__ = 0x0;
/*-Exports-*/
export symbol __ICFEDIT_region_SDRAM_start__;
export symbol __ICFEDIT_region_SDRAM_end__;
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
export symbol __ICFEDIT_size_startup__;
export symbol __ICFEDIT_size_vectors__;
export symbol __ICFEDIT_size_cstack__;
export symbol __ICFEDIT_size_sysstack__;
export symbol __ICFEDIT_size_irqstack__;
export symbol __ICFEDIT_size_heap__;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region STA_region = mem:[from __ICFEDIT_region_SDRAM_start__ size __ICFEDIT_size_startup__];
define region SDRAM_region = mem:[from __ICFEDIT_region_SDRAM_start__+__ICFEDIT_size_startup__ to __ICFEDIT_region_SDRAM_end__];
define region VEC_region = mem:[from __ICFEDIT_region_RAM_start__ size __ICFEDIT_size_vectors__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block SYS_STACK with alignment = 8, size = __ICFEDIT_size_sysstack__ { };
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { section .vectors };
do not initialize { section .noinit };
place in STA_region { section .cstartup };
place in VEC_region { section .vectors };
place in SDRAM_region { readonly, readwrite, block IRQ_STACK, block SYS_STACK, block CSTACK, block HEAP };
; * ----------------------------------------------------------------------------
; * ATMEL Microcontroller Software Support
; * ----------------------------------------------------------------------------
; * Copyright (c) 2008, Atmel Corporation
; *
; * All rights reserved.
; *
; * Redistribution and use in source and binary forms, with or without
; * modification, are permitted provided that the following conditions are met:
; *
; * - Redistributions of source code must retain the above copyright notice,
; * this list of conditions and the disclaimer below.
; *
; * Atmel's name may not be used to endorse or promote products derived from
; * this software without specific prior written permission.
; *
; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; * ----------------------------------------------------------------------------
; *------------------------------------------------------------------------------
; * Linker scatter for running in external SDRAM on the AT91SAM9263
; *----------------------------------------------------------------------------*/
Load_region 0x20000000 0x4000000 {
Fixed_region 0x20000000 {
*(cstartup +First)
.ANY (+RO +RW +ZI)
}
Relocate_region 0x300000 0x10000 {
*.o (VECTOR, +First)
}
ARM_LIB_HEAP 0x21FFE000 EMPTY 0x1000 {
}
ARM_LIB_STACK 0x22000000 EMPTY -0x1000 {
}
}
\ No newline at end of file
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support - ROUSSET -
* ----------------------------------------------------------------------------
* Copyright (c) 2007, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the disclaimer below in the documentation and/or
* other materials provided with the distribution.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*------------------------------------------------------------------------------
* Linker script for running in external SDRAM on the AT91SAM9263
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
MEMORY
{
sram (W!RX) : ORIGIN = 0x300000, LENGTH = 0x14000
sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 64M
}
SECTIONS
{
.fixed :
{
. = ALIGN(4);
_sfixed = .;
*(.text*)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.data)
. = ALIGN(4);
_efixed = .;
} >sdram
.prerelocate : AT (_efixed)
{
. = ALIGN(4);
_sprerelocate = .;
. = ALIGN(4);
_eprerelocate = .;
}
.postrelocate : AT (_efixed + SIZEOF(.prerelocate))
{
. = ALIGN(4);
_spostrelocate = .;
*(.vectors);
. = ALIGN(4);
_epostrelocate = .;
} >sram
.bss (NOLOAD) : {
_szero = .;
*(.bss)
. = ALIGN(4);
_ezero = .;
} >sdram
/* _sstack = 0x314000; */
_sstack = 0x22000000;
}
end = .;
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
/*-Memory Regions-*/
define symbol __ICFEDIT_region_RAM_start__ = 0x300000;
define symbol __ICFEDIT_region_RAM_end__ = 0x30FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_vectors__ = 0x100;
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_sysstack__ = 0x60;
define symbol __ICFEDIT_size_irqstack__ = 0x60;
define symbol __ICFEDIT_size_heap__ = 0x0;
/*-Exports-*/
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;
export symbol __ICFEDIT_size_vectors__;
export symbol __ICFEDIT_size_cstack__;
export symbol __ICFEDIT_size_sysstack__;
export symbol __ICFEDIT_size_irqstack__;
export symbol __ICFEDIT_size_heap__;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region VEC_region = mem:[from __ICFEDIT_region_RAM_start__ size __ICFEDIT_size_vectors__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__+__ICFEDIT_size_vectors__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block SYS_STACK with alignment = 8, size = __ICFEDIT_size_sysstack__ { };
define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
do not initialize { section .noinit };
place in VEC_region { section .vectors };
place in RAM_region { section .cstartup, readonly, readwrite, block IRQ_STACK, block SYS_STACK, block CSTACK, block HEAP };
; * ----------------------------------------------------------------------------
; * ATMEL Microcontroller Software Support
; * ----------------------------------------------------------------------------
; * Copyright (c) 2008, Atmel Corporation
; *
; * All rights reserved.
; *
; * Redistribution and use in source and binary forms, with or without
; * modification, are permitted provided that the following conditions are met:
; *
; * - Redistributions of source code must retain the above copyright notice,
; * this list of conditions and the disclaimer below.
; *
; * Atmel's name may not be used to endorse or promote products derived from
; * this software without specific prior written permission.
; *
; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; * ----------------------------------------------------------------------------
; *------------------------------------------------------------------------------
; * Linker scatter for running in internal SRAM on the AT91SAM9263
; *----------------------------------------------------------------------------*/
Load_region 0x300000 0x14000 {
Fixed_region 0x300000 {
*.o (VECTOR, +First)
.ANY (+RO)
}
Relocate_region +0 {
*(cstartup +First)
.ANY (+RW +ZI)
}
ScatterAssert((ImageLength(Fixed_region) + ImageLength(Relocate_region)) < 0xF000)
ARM_LIB_HEAP 0x313000 EMPTY 0x800 {
}
ARM_LIB_STACK 0x314000 EMPTY -0x800 {
}
}
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*
IAR startup file for AT91SAM9263 microcontrollers.
*/
MODULE ?cstartup
;; Forward declaration of sections.
SECTION IRQ_STACK:DATA:NOROOT(2)
SECTION CSTACK:DATA:NOROOT(3)
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
#define __ASSEMBLY__
#include "board.h"
//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------
#define ARM_MODE_ABT 0x17
#define ARM_MODE_FIQ 0x11
#define ARM_MODE_IRQ 0x12
#define ARM_MODE_SVC 0x13
#define ARM_MODE_SYS 0x1F
#define I_BIT 0x80
#define F_BIT 0x40
//------------------------------------------------------------------------------
// Startup routine
//------------------------------------------------------------------------------
/*
Exception vectors
*/
SECTION .vectors:CODE:NOROOT(2)
PUBLIC resetVector
PUBLIC irqHandler
EXTERN Undefined_Handler
EXTERN SWI_Handler
EXTERN Prefetch_Handler
EXTERN Abort_Handler
EXTERN FIQ_Handler
ARM
__iar_init$$done: ; The interrupt vector is not needed
; until after copy initialization is done
resetVector:
; All default exception handlers (except reset) are
; defined as weak symbol definitions.
; If a handler is defined by the application it will take precedence.
LDR pc, =resetHandler ; Reset
LDR pc, Undefined_Addr ; Undefined instructions
LDR pc, SWI_Addr ; Software interrupt (SWI/SYS)
LDR pc, Prefetch_Addr ; Prefetch abort
LDR pc, Abort_Addr ; Data abort
B . ; RESERVED
LDR pc, =irqHandler ; IRQ
LDR pc, FIQ_Addr ; FIQ
Undefined_Addr: DCD Undefined_Handler
SWI_Addr: DCD SWI_Handler
Prefetch_Addr: DCD Prefetch_Handler
Abort_Addr: DCD Abort_Handler
FIQ_Addr: DCD FIQ_Handler
/*
Handles incoming interrupt requests by branching to the corresponding
handler, as defined in the AIC. Supports interrupt nesting.
*/
irqHandler:
/* Save interrupt context on the stack to allow nesting */
SUB lr, lr, #4
STMFD sp!, {lr}
MRS lr, SPSR
STMFD sp!, {r0, lr}
/* Write in the IVR to support Protect Mode */
LDR lr, =AT91C_BASE_AIC
LDR r0, [r14, #AIC_IVR]
STR lr, [r14, #AIC_IVR]
/* Branch to interrupt handler in Supervisor mode */
MSR CPSR_c, #ARM_MODE_SYS
STMFD sp!, {r1-r3, r4, r12, lr}
BLX r0
LDMIA sp!, {r1-r3, r4, r12, lr}
MSR CPSR_c, #ARM_MODE_IRQ | I_BIT
/* Acknowledge interrupt */
LDR lr, =AT91C_BASE_AIC
STR lr, [r14, #AIC_EOICR]
/* Restore interrupt context and branch back to calling code */
LDMIA sp!, {r0, lr}
MSR SPSR_cxsf, lr
LDMIA sp!, {pc}^
/*
After a reset, execution starts here, the mode is ARM, supervisor
with interrupts disabled.
Initializes the chip and branches to the main() function.
*/
SECTION .cstartup:CODE:NOROOT(2)
PUBLIC resetHandler
EXTERN LowLevelInit
EXTERN ?main
REQUIRE resetVector
ARM
resetHandler:
/* Set pc to actual code location (i.e. not in remap zone) */
LDR pc, =label
/* Perform low-level initialization of the chip using LowLevelInit() */
label:
LDR r0, =LowLevelInit
LDR r4, =SFE(CSTACK)
MOV sp, r4
BLX r0
/* Set up the interrupt stack pointer. */
MSR cpsr_c, #ARM_MODE_IRQ | I_BIT | F_BIT ; Change the mode
LDR sp, =SFE(IRQ_STACK)
/* Set up the SYS stack pointer. */
MSR cpsr_c, #ARM_MODE_SYS | F_BIT ; Change the mode
LDR sp, =SFE(CSTACK)
/* Branch to main() */
LDR r0, =?main
BLX r0
/* Loop indefinitely when program is finished */
loop4:
B loop4
END
; * ----------------------------------------------------------------------------
; * ATMEL Microcontroller Software Support
; * ----------------------------------------------------------------------------
; * Copyright (c) 2008, Atmel Corporation
; *
; * All rights reserved.
; *
; * Redistribution and use in source and binary forms, with or without
; * modification, are permitted provided that the following conditions are met:
; *
; * - Redistributions of source code must retain the above copyright notice,
; * this list of conditions and the disclaimer below.
; *
; * Atmel's name may not be used to endorse or promote products derived from
; * this software without specific prior written permission.
; *
; * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
; * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
; * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
; * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
; * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
; * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
; * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
; * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
; * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
; * ----------------------------------------------------------------------------
; KEIL startup file for AT91SAM9263 microcontrollers.
; ------------------------------------------------------------------------------
; Definitions
; ------------------------------------------------------------------------------
; Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
ARM_MODE_USR EQU 0x10
ARM_MODE_FIQ EQU 0x11
ARM_MODE_IRQ EQU 0x12
ARM_MODE_SVC EQU 0x13
ARM_MODE_ABT EQU 0x17
ARM_MODE_UND EQU 0x1B
ARM_MODE_SYS EQU 0x1F
I_BIT EQU 0x80 ; when I bit is set, IRQ is disabled
F_BIT EQU 0x40 ; when F bit is set, FIQ is disabled
AT91C_BASE_AIC EQU 0xFFFFF000
AIC_IVR EQU 0x100
AIC_EOICR EQU 0x130
UND_Stack_Size EQU 0x00000000
SVC_Stack_Size EQU 0x00000100
ABT_Stack_Size EQU 0x00000000
FIQ_Stack_Size EQU 0x00000000
IRQ_Stack_Size EQU 0x00000080
USR_Stack_Size EQU 0x00000400
PRESERVE8
; Area Definition and Entry Point
; Startup Code must be linked first at Address at which it expects to run.
AREA VECTOR, CODE
ARM
; Exception Vectors
Vectors
LDR pc,=resetHandler
undefVector
b undefVector ; Undefined instruction
swiVector
b swiVector ; Software interrupt
prefetchAbortVector
b prefetchAbortVector ; Prefetch abort
dataAbortVector
b dataAbortVector ; Data abort
reservedVector
b reservedVector ; Reserved for future use
irqVector
b irqHandler ; Interrupt
fiqVector
; Fast interrupt
;------------------------------------------------------------------------------
; Handles a fast interrupt request by branching to the address defined in the
; AIC.
;------------------------------------------------------------------------------
fiqHandler
b fiqHandler
;------------------------------------------------------------------------------
; Handles incoming interrupt requests by branching to the corresponding
; handler, as defined in the AIC. Supports interrupt nesting.
;------------------------------------------------------------------------------
irqHandler
; Save interrupt context on the stack to allow nesting */
SUB lr, lr, #4
STMFD sp!, {lr}
MRS lr, SPSR
STMFD sp!, {r0,r1,lr}
; Write in the IVR to support Protect Mode */
LDR lr, =AT91C_BASE_AIC
LDR r0, [r14, #AIC_IVR]
STR lr, [r14, #AIC_IVR]
; Branch to interrupt handler in Supervisor mode */
MSR CPSR_c, #ARM_MODE_SVC
STMFD sp!, {r1-r4, r12, lr}
MOV lr, pc
BX r0
LDMIA sp!, {r1-r4, r12, lr}
MSR CPSR_c, #ARM_MODE_IRQ | I_BIT
; Acknowledge interrupt */
LDR lr, =AT91C_BASE_AIC
STR lr, [r14, #AIC_EOICR]
; Restore interrupt context and branch back to calling code
LDMIA sp!, {r0,r1,lr}
MSR SPSR_cxsf, lr
LDMIA sp!, {pc}^
;------------------------------------------------------------------------------
; After a reset, execution starts here, the mode is ARM, supervisor
; with interrupts disabled.
; Initializes the chip and branches to the main() function.
;------------------------------------------------------------------------------
AREA cstartup, CODE
ENTRY ; Entry point for the application
; Reset Handler
EXPORT resetHandler
IMPORT |Image$$Fixed_region$$Limit|
IMPORT |Image$$Relocate_region$$Base|
IMPORT |Image$$Relocate_region$$ZI$$Base|
IMPORT |Image$$Relocate_region$$ZI$$Limit|
IMPORT |Image$$ARM_LIB_STACK$$Base|
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
; Perform low-level initialization of the chip using LowLevelInit()
IMPORT LowLevelInit
resetHandler
; Set pc to actual code location (i.e. not in remap zone)
LDR pc, =label
label
; Set up temporary stack (Top of the SRAM)
LDR r0, = |Image$$ARM_LIB_STACK$$ZI$$Limit|
MOV sp, r0
; Call Low level init
LDR r0, =LowLevelInit
MOV lr, pc
BX r0
;Initialize the Relocate_region segment
LDR r0, = |Image$$Fixed_region$$Limit|
LDR r1, = |Image$$Relocate_region$$Base|
LDR r3, = |Image$$Relocate_region$$ZI$$Base|
CMP r0, r1
BEQ %1
; Copy init data
0 CMP r1, r3
LDRCC r2, [r0], #4
STRCC r2, [r1], #4
BCC %0
1 LDR r1, =|Image$$Relocate_region$$ZI$$Limit|
MOV r2, #0
2 CMP r3, r1
STRCC r2, [r3], #4
BCC %2
; Setup Stack for each mode
LDR R0, = |Image$$ARM_LIB_STACK$$ZI$$Limit|
; Enter IRQ Mode and set its Stack Pointer
MSR CPSR_c, #ARM_MODE_IRQ:OR:I_BIT:OR:F_BIT
MOV SP, R0
SUB R4, SP, #IRQ_Stack_Size
; Supervisor mode (interrupts enabled)
MSR CPSR_c, #ARM_MODE_SVC | F_BIT
MOV SP, R4
; Enter the C code
IMPORT __main
LDR R0, =__main
BX R0
loop4
B loop4
END
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// Definition of AT91SAM9G45 characteristics and features
///
/// !Usage
/// -# For ARM core feature, see "AT91SAM9G45 - ARM core features".
/// -# For IP features, see "AT91SAM9G45 - IP features".
/// -# For misc, see "AT91SAM9G45 - Misc".
//------------------------------------------------------------------------------
#ifndef CHIP_H
#define CHIP_H
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "AT91SAM9G45 - ARM core features"
/// This page lists several characteristics related to the ARM core
///
//ARM core features
/// ARM core definition.
#define arm926ej_s
/// family definition.
//#define at91sam9g45 (already defined)
/// temporary define, to be removed
#define CP15_PRESENT
//------------------------------------------------------------------------------
/// \page "AT91SAM9G45 - IP features"
/// This page lists several characteristics related to the embedded IP
///
//IP FEATURES
// DMA channels number
#define CHIP_DMA_CHANNEL_NUM 8
// Indicate chip's MCI interface.
#define MCI2_INTERFACE
/// Indicates chip has an UDP High Speed.
#define CHIP_USB_UDPHS
/// Indicates chip has an Host High Speed.
#define CHIP_USB_UHP_OHCI
#define CHIP_USB_UHP_EHCI
/// Indicates chip has an internal pull-up.
#define CHIP_USB_PULLUP_INTERNAL
/// Number of USB endpoints
#define CHIP_USB_NUMENDPOINTS 7
/// Endpoints max paxcket size
#define CHIP_USB_ENDPOINTS_MAXPACKETSIZE(i) \
((i == 0) ? 64 : \
((i == 1) ? 1024 : \
((i == 2) ? 1024 : \
((i == 3) ? 1024 : \
((i == 4) ? 1024 : \
((i == 5) ? 1024 : \
((i == 6) ? 1024 : 0 )))))))
/// Endpoints Number of Bank
#define CHIP_USB_ENDPOINTS_BANKS(i) \
((i == 0) ? 1 : \
((i == 1) ? 2 : \
((i == 2) ? 2 : \
((i == 3) ? 3 : \
((i == 4) ? 3 : \
((i == 5) ? 3 : \
((i == 6) ? 3 : 0 )))))))
/// Endpoints max paxcket size
#define CHIP_USB_ENDPOINTS_DMA(i) \
((i == 1) ? 1 : \
((i == 2) ? 1 : \
((i == 3) ? 1 : \
((i == 4) ? 1 : \
((i == 5) ? 1 : \
((i == 6) ? 1 : 0 ))))))
//------------------------------------------------------------------------------
/// \page "AT91SAM9G45 - Misc "
/// This page lists misc features
///
//Misc
#endif //#ifndef CHIP_H
......@@ -26,7 +26,9 @@
# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# ----------------------------------------------------------------------------
# Defines which are the specific available IP for the chip AT91SAM9263
# Defines which are the specific available IP for the chip AT91SAM9G45
CHIP_CORE = arm926ej_s
CHIP_IP_MCI = MCI_PDC
CHIP_IP_MCI = MCI_DMA
CHIP_IP_UDP = USB_UDPHS
CHIP_IP_UHP = USB_EHCI
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*------------------------------------------------------------------------------
* Linker script for running in external SDRAM on the AT91SAM9263
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
MEMORY
{
sram (W!RX) : ORIGIN = 0x300000, LENGTH = 80K
sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 64M
}
SECTIONS
{
.fixed :
{
. = ALIGN(4);
_sfixed = .;
*(.text*)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.data)
. = ALIGN(4);
_efixed = .;
} >sdram
.prerelocate : AT (_efixed)
{
. = ALIGN(4);
_sprerelocate = .;
. = ALIGN(4);
_eprerelocate = .;
}
.postrelocate : AT (_efixed + SIZEOF(.prerelocate))
{
. = ALIGN(4);
_spostrelocate = .;
*(.vectors);
*(.ramfunc)
. = ALIGN(4);
_epostrelocate = .;
} >sram
.bss (NOLOAD) : {
_szero = .;
*(.bss)
. = ALIGN(4);
_ezero = .;
} >sram
_sstack = 0x24000000;
}
end = .;
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*------------------------------------------------------------------------------
* Linker script for running in external DDRAM on the AT91SAM9G45
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
MEMORY
{
sram (W!RX) : ORIGIN = 0x300000, LENGTH = 64K
ddr_ebi0 (W!RX) : ORIGIN = 0x70000000, LENGTH = 64M
}
SECTIONS
{
.fixed :
{
. = ALIGN(4);
_sfixed = .;
*(.text*)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.data)
*(.CP15_*)
. = ALIGN(4);
_efixed = .;
} >ddr_ebi0
.prerelocate : AT (_efixed)
{
. = ALIGN(4);
_sprerelocate = .;
. = ALIGN(4);
_eprerelocate = .;
}
.postrelocate : AT (_efixed + SIZEOF(.prerelocate))
{
. = ALIGN(4);
_spostrelocate = .;
*(.vectors);
*(.ramfunc)
. = ALIGN(4);
_epostrelocate = .;
} >sram
.bss (NOLOAD) : {
_szero = .;
*(.bss)
. = ALIGN(4);
_ezero = .;
} >ddr_ebi0
_sstack = 0x70000000 + 64 * 1024 * 1024;
}
end = .;
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support - ROUSSET -
* ----------------------------------------------------------------------------
* Copyright (c) 2007, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the disclaimer below in the documentation and/or
* other materials provided with the distribution.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*------------------------------------------------------------------------------
* Linker script for running in internal SRAM on the AT91SAM9263
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
MEMORY
{
sram (W!RX) : ORIGIN = 0x300000, LENGTH = 80K
sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 64M
}
SECTIONS
{
.fixed :
{
. = ALIGN(4);
_sfixed = .;
*(.vectors)
*(.ramfunc)
*(.text*)
*(.glue_7)
*(.glue_7t)
*(.rodata*)
*(.data)
. = ALIGN(4);
_efixed = .;
} >sram
.prerelocate : AT (_efixed)
{
. = ALIGN(4);
_sprerelocate = .;
. = ALIGN(4);
_eprerelocate = .;
}
.postrelocate : AT (_efixed + SIZEOF(.prerelocate))
{
. = ALIGN(4);
_spostrelocate = .;
. = ALIGN(4);
_epostrelocate = .;
}
.bss (NOLOAD) : {
_szero = .;
*(.bss)
. = ALIGN(4);
_ezero = .;
} >sram
_sstack = 0x314000;
}
end = .;
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*------------------------------------------------------------------------------
* Linker script for running in external DDRAM on the AT91SAM9G45
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
MEMORY
{
sram (W!RX) : ORIGIN = 0x300000, LENGTH = 64K
ddr_ebi0 (W!RX) : ORIGIN = 0x70000000, LENGTH = 64M
ddr_ebi1 (W!RX) : ORIGIN = 0x20000000, LENGTH = 64M
}
SECTIONS
{
.fixed :
{
. = ALIGN(4);
_sfixed = .;
*(.text*)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
*(.data)
*(.CP15_*)
. = ALIGN(4);
_efixed = .;
} >ddr_ebi0
.prerelocate : AT (_efixed)
{
. = ALIGN(4);
_sprerelocate = .;
. = ALIGN(4);
_eprerelocate = .;
}
.postrelocate : AT (_efixed + SIZEOF(.prerelocate))
{
. = ALIGN(4);
_spostrelocate = .;
*(.vectors);
*(.ramfunc)
. = ALIGN(4);
_epostrelocate = .;
} >sram
.bss (NOLOAD) : {
_szero = .;
*(.bss)
. = ALIGN(4);
_ezero = .;
} >ddr_ebi0
_sstack = 0x70000000 + 64 * 1024 * 1024;
}
end = .;
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*------------------------------------------------------------------------------
* Linker script for running in external FLASH on the AT91SAM9263
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
MEMORY
{
sram (W!RX) : ORIGIN = 0x00300000, LENGTH = 80K
sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 64M
ebi_cs0 (RX) : ORIGIN = 0x10000000, LENGTH = 256M
}
SECTIONS
{
.prerelocate : AT (_efixed)
{
. = ALIGN(4);
_sprerelocate = .;
*(.vectors)
*(.ramfunc)
*(.data)
*board_lowlevel.o(.text*)
*board_memories.o(.text*)
. = ALIGN(4);
_eprerelocate = .;
} >sram
.fixed :
{
. = ALIGN(4);
_sfixed = .;
*(.text*)
*(.rodata*)
*(.glue_7)
*(.glue_7t)
. = ALIGN(4);
_efixed = .;
} >ebi_cs0
.postrelocate : AT (_efixed + SIZEOF(.prerelocate))
{
. = ALIGN(4);
_spostrelocate = .;
. = ALIGN(4);
_epostrelocate = .;
} >sram
.bss (NOLOAD) : {
_szero = .;
*(.bss)
. = ALIGN(4);
_ezero = .;
} >sram
_sstack = 0x314000;
}
end = .;
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*------------------------------------------------------------------------------
* Linker script for running in internal SRAM on the AT91SAM9G45
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
MEMORY
{
sram (W!RX) : ORIGIN = 0x300000, LENGTH = 64K
ddr_ebi0 (W!RX) : ORIGIN = 0x70000000, LENGTH = 128M
}
SECTIONS
{
.fixed0 :
{
. = ALIGN(4);
_sfixed0 = .;
*(.vectors)
*(.ramfunc)
*(.text*)
*(.rodata*)
*(.data)
*(.glue_7)
*(.glue_7t)
*(.CP15_*)
. = ALIGN(4);
_efixed0 = .;
_efixed = .;
} >sram
.fixed1 :
{
. = ALIGN(4);
_sfixed1 = .;
. = ALIGN(4);
_efixed1 = .;
} >sram
.prerelocate : AT (_efixed)
{
. = ALIGN(4);
_sprerelocate = .;
. = ALIGN(4);
_eprerelocate = .;
}
.postrelocate : AT (_efixed + SIZEOF(.prerelocate))
{
. = ALIGN(4);
_spostrelocate = .;
. = ALIGN(4);
_epostrelocate = .;
}
.bss (NOLOAD) : {
_szero = .;
*(.bss)
. = ALIGN(4);
_ezero = .;
} >sram
_sstack = 0x300000 + 64 * 1024;
}
end = .;
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support - ROUSSET -
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* - Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the disclaimer below in the documentation and/or
* other materials provided with the distribution.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*------------------------------------------------------------------------------
* Linker script for running in internal SRAM on the AT91SAM9263
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
MEMORY
{
romcodesram (W!RX) : ORIGIN = 0x300000, LENGTH = 0x1000
sram (W!RX) : ORIGIN = 0x301000, LENGTH = 0x13000
}
SECTIONS
{
.fixed :
{
. = ALIGN(4);
_sfixed = .;
*(.vectors)
*(.text*)
*(.glue_7)
*(.glue_7t)
*(.rodata*)
*(.data)
. = ALIGN(4);
_efixed = .;
} >sram
.prerelocate : AT (_efixed)
{
. = ALIGN(4);
_sprerelocate = .;
. = ALIGN(4);
_eprerelocate = .;
}
.postrelocate : AT (_efixed + SIZEOF(.prerelocate))
{
. = ALIGN(4);
_spostrelocate = .;
. = ALIGN(4);
_epostrelocate = .;
}
.bss (NOLOAD) : {
_szero = .;
*(.bss)
. = ALIGN(4);
_ezero = .;
} >sram
_sstack = 0x314000;
}
end = .;
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
/*------------------------------------------------------------------------------
* Linker script for running in internal SRAM on the AT91SAM9G45
*----------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(entry)
MEMORY
{
romcodesram (W!RX) : ORIGIN = 0x30F000, LENGTH = 0x1000
sram (W!RX) : ORIGIN = 0x300000, LENGTH = 0xF000
ddr_ebi0 (W!RX) : ORIGIN = 0x70000000, LENGTH = 128M
ddr_ebi1 (W!RX) : ORIGIN = 0x20000000, LENGTH = 128M
}
SECTIONS
{
.fixed0 :
{
. = ALIGN(4);
_sfixed0 = .;
*(.vectors)
*(.ramfunc)
*(.text*)
*(.rodata*)
*(.data)
*(.glue_7)
*(.glue_7t)
*(.CP15_*)
. = ALIGN(4);
_efixed0 = .;
_efixed = .;
} >sram
.fixed1 :
{
. = ALIGN(4);
_sfixed1 = .;
. = ALIGN(4);
_efixed1 = .;
} >sram
.prerelocate : AT (_efixed)
{
. = ALIGN(4);
_sprerelocate = .;
. = ALIGN(4);
_eprerelocate = .;
}
.postrelocate : AT (_efixed + SIZEOF(.prerelocate))
{
. = ALIGN(4);
_spostrelocate = .;
. = ALIGN(4);
_epostrelocate = .;
}
.bss (NOLOAD) : {
_szero = .;
*(.bss)
. = ALIGN(4);
_ezero = .;
} >sram
_sstack = 0x30F000;
}
end = .;
# ----------------------------------------------------------------------------
# ATMEL Microcontroller Software Support
# ----------------------------------------------------------------------------
# Copyright (c) 2008, Atmel Corporation
#
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# - Redistributions of source code must retain the above copyright notice,
# this list of conditions and the disclaimer below.
#
# Atmel's name may not be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
# DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
# OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# ----------------------------------------------------------------------------
# Defines which are the available memory targets for the AT91SAM9263-EK board.
MEMORIES = sdram sram
# ----------------------------------------------------------------------------
# ATMEL Microcontroller Software Support
# ----------------------------------------------------------------------------
# Copyright (c) 2008, Atmel Corporation
#
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
#
# - Redistributions of source code must retain the above copyright notice,
# this list of conditions and the disclaimer below.
#
# Atmel's name may not be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
# DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
# OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
# EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# ----------------------------------------------------------------------------
# Defines which are the available memory targets for the AT91SAM9G45-EK board.
MEMORIES = ddram sram
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
......@@ -27,6 +27,19 @@
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
///
/// !Purpose
///
/// Provides the low-level initialization function that gets called on chip
/// startup.
///
/// !Usage
///
/// LowLevelInit() is called in #board_cstartup.S#.
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
......@@ -38,25 +51,16 @@
//------------------------------------------------------------------------------
// Internal definitions
//------------------------------------------------------------------------------
/*
Constants: Clock and PLL settings
BOARD_OSCOUNT - Startup time of main oscillator (in number of slow clock
ticks).
BOARD_USBDIV - USB PLL divisor value to obtain a 48MHz clock.
BOARD_CKGR_PLL - PLL frequency range.
BOARD_PLLCOUNT - PLL startup time (in number of slow clock ticks).
BOARD_MUL - PLL MUL value.
BOARD_DIV - PLL DIV value.
BOARD_PRESCALER - Master clock prescaler value.
*/
#define BOARD_OSCOUNT (AT91C_CKGR_OSCOUNT & (64 << 8))
#define PLLA_SETTINGS 0x2060BF09
#define PLLB_SETTINGS 0x10483F0E
/* Settings at 400/133MHz */
#define BOARD_OSCOUNT (AT91C_CKGR_OSCOUNT & (64 << 8))
#define BOARD_CKGR_PLLA (AT91C_CKGR_SRCA | AT91C_CKGR_OUTA_0)
#define BOARD_PLLACOUNT (0x3F << 8)
#define BOARD_MULA (AT91C_CKGR_MULA & (199 << 16))
#define BOARD_DIVA (AT91C_CKGR_DIVA & 3)
#define BOARD_PRESCALER AT91C_PMC_MDIV_2
//#define BOARD_PRESCALER (0x00001300) //400/133MHz
#define BOARD_PRESCALER (0x00001200) //400/100MHz
//------------------------------------------------------------------------------
// Internal functions
......@@ -85,47 +89,56 @@ void defaultIrqHandler( void )
while (1);
}
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// Performs the low-level initialization of the chip.
/// Performs the low-level initialization of the chip. Initialisation depends
/// on where the application is executed:
/// - in sdram: it means that sdram has previously been initialized. No further
/// initialization is required.
/// - in sram: PLL shall be initialized in LowLevelInit. Other initializations
/// can be done later by the application.
/// - in norflash: LowLevelInit can't be executed in norflash because SMC
/// settings can't be changed while executing in external flash.
/// LowLevelInit shall be executed in internal sram. It initializes
/// PLL and SMC.
/// This function also reset the AIC and disable RTT and PIT interrupts
//------------------------------------------------------------------------------
void LowLevelInit( void )
void LowLevelInit(void)
{
unsigned char i;
#if !defined(sdram)
/* Initialize main oscillator
#if !defined(ddram)
for(i=0;i<3;i++) /* it seems that the PLL doesn't start up propely the 1st time it's programmed */
{
/* Initialize main oscillator
****************************/
AT91C_BASE_PMC->PMC_MOR = BOARD_OSCOUNT | AT91C_CKGR_MOSCEN;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
/* Initialize PLLA at 200MHz (198.656) */
AT91C_BASE_PMC->PMC_PLLAR = PLLA_SETTINGS;
/* Initialize PLLA */
AT91C_BASE_PMC->PMC_PLLAR = BOARD_CKGR_PLLA
| BOARD_PLLACOUNT
| BOARD_MULA
| BOARD_DIVA;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKA));
// Initialize PLLB for USB usage (if not already locked)
if (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKB)) {
AT91C_BASE_PMC->PMC_PLLBR = PLLB_SETTINGS;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKB));
}
/* Wait for the master clock if it was already initialized */
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
/* Switch to fast clock
**********************/
/* Switch to main oscillator + prescaler */
AT91C_BASE_PMC->PMC_MCKR = BOARD_PRESCALER;
AT91C_BASE_PMC->PMC_MCKR = (AT91C_BASE_PMC->PMC_MCKR & 0x3) | BOARD_PRESCALER;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
/* Switch to PLL + prescaler */
AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLLA_CLK;
AT91C_BASE_PMC->PMC_MCKR = (AT91C_BASE_PMC->PMC_MCKR & 0xfffffffc) | AT91C_PMC_CSS_PLLA_CLK;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
#endif //#if !defined(sdram)
}
#endif
/* Initialize AIC
****************/
......@@ -143,9 +156,12 @@ void LowLevelInit( void )
AT91C_BASE_AIC->AIC_EOICR = 0;
}
/* Watchdog initialization
*************************/
#ifndef WDT_APP // Watchdog init in application ?
AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
#endif
/* Remap
*******/
......@@ -154,11 +170,11 @@ void LowLevelInit( void )
// Disable RTT and PIT interrupts (potential problem when program A
// configures RTT, then program B wants to use PIT only, interrupts
// from the RTT will still occur since they both use AT91C_ID_SYS)
AT91C_BASE_RTTC0->RTTC_RTMR &= ~(AT91C_RTTC_ALMIEN | AT91C_RTTC_RTTINCIEN);
AT91C_BASE_RTTC1->RTTC_RTMR &= ~(AT91C_RTTC_ALMIEN | AT91C_RTTC_RTTINCIEN);
AT91C_BASE_RTTC->RTTC_RTMR &= ~(AT91C_RTTC_ALMIEN | AT91C_RTTC_RTTINCIEN);
AT91C_BASE_PITC->PITC_PIMR &= ~AT91C_PITC_PITIEN;
#if defined(norflash)
BOARD_ConfigureNorFlash(BOARD_NORFLASH_DFT_BUS_SIZE);
#endif
#endif
}
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
......@@ -46,6 +46,7 @@
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
extern void LowLevelInit(void);
#endif // BOARD_LOWLEVEL_H
......
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
......@@ -30,17 +30,32 @@
#ifndef BOARD_MEMORIES_H
#define BOARD_MEMORIES_H
//------------------------------------------------------------------------------
// Exported functions
// Definitions
//------------------------------------------------------------------------------
// DDRAM models used as parameter of configureDdram().
#define DDR_MICRON_MT47H64M8 0
#define DDR_SAMSUNG_M470T6554EZ3_CE6 1
#define VDDMEMSEL_1V8 0
#define VDDMEMSEL_3V3 1
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
extern void BOARD_RemapRom(void);
extern void BOARD_RemapRam(void);
extern void BOARD_ConfigureSdram(unsigned char busWidth);
extern void BOARD_ConfigureVddMemSel(unsigned char VddMemSel);
extern void BOARD_ConfigureDdram(unsigned char ddrModel, unsigned char busWidth);
extern void BOARD_ConfigureSdram48MHz(unsigned char busWidth);
extern void BOARD_ConfigureDdramCp1(unsigned char busWidth);
extern void BOARD_ConfigureSdram(unsigned char busWidth);
extern void BOARD_ConfigureNandFlash(unsigned char busWidth);
......
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
......@@ -28,63 +28,37 @@
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// Definition of AT91SAM9263 characteristics and features
///
/// !Usage
/// -# For ARM core feature, see "AT91SAM9263 - ARM core features".
/// -# For IP features, see "AT91SAM9263 - IP features".
/// -# For misc, see "AT91SAM9263 - Misc".
// Headers
//------------------------------------------------------------------------------
#ifndef CHIP_H
#define CHIP_H
#include "board.h"
#include <pmc/pmc.h>
//------------------------------------------------------------------------------
// Headers
// Internal definitions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Definitions
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
/// \page "AT91SAM9263 - ARM core features"
/// This page lists several characteristics related to the ARM core
///
//ARM core features
/// ARM core definition.
#define arm926ej_s
/// family definition.
//#define at91sam9263 (already defined)
// Internal functions
//------------------------------------------------------------------------------
/// temporary define, to be removed
#define CP15_PRESENT
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
/// \page "AT91SAM9263 - IP features"
/// This page lists several characteristics related to the embedded IP
///
//IP FEATURES
//------------------------------------------------------------------------------
/// Put the CPU in IDLE mode with CP15
//------------------------------------------------------------------------------
/// \page "AT91SAM9263 - Misc "
/// This page lists misc features
///
//Misc
void LowPowerMode(void)
{
PMC_CPUInIdleMode();
}
//------------------------------------------------------------------------------
#endif //#ifndef CHIP_H
/// Returns to normal mode automatically
//------------------------------------------------------------------------------
void NormalPowerMode(void)
{
}
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
///
/// !Usage
///
//------------------------------------------------------------------------------
#ifndef BOARD_POWERMODE_H
#define BOARD_POWERMODE_H
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
extern void LowPowerMode(void);
extern void NormalPowerMode(void);
#endif //#ifndef BOARD_MEMORIES_H
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support - ROUSSET -
* ----------------------------------------------------------------------------
* Copyright (c) 2007, Stelian Pop <stelian.pop@leadtechdesign.com>
* Copyright (c) 2007 Lead Tech Design <www.leadtechdesign.com>
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaiimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
* File Name : sdramc.c
* Object :
* Creation :
*-----------------------------------------------------------------------------
*/
#include "../include/part.h"
#include "../include/main.h"
#include "../include/ddramc.h"
#ifdef CFG_DDRAM
/* Write DDRC register */
static void write_ddramc(unsigned int address, unsigned int offset, const unsigned int value)
{
writel(value, (address + offset));
}
/* Read DDRC registers */
static unsigned int read_ddramc(unsigned int address, unsigned int offset)
{
return readl((address + offset));
}
//*----------------------------------------------------------------------------
//* \fn sdram_init
//* \brief Initialize the SDDRC Controller
//*----------------------------------------------------------------------------
int ddram_init(unsigned int ddram_controller_address, unsigned int ddram_address, struct SDdramConfig *ddram_config)
{
volatile unsigned int i;
unsigned int cr = 0;
// Step 1: Program the memory device type
// Configure the DDR controller
write_ddramc(ddram_controller_address, HDDRSDRC2_MDR, ddram_config->ddramc_mdr);
// Program the DDR Controller
write_ddramc(ddram_controller_address, HDDRSDRC2_CR, ddram_config->ddramc_cr);
// assume timings for 7.5ns min clock period
write_ddramc(ddram_controller_address, HDDRSDRC2_T0PR, ddram_config->ddramc_t0pr);
// pSDDRC->HDDRSDRC2_T1PR
write_ddramc(ddram_controller_address, HDDRSDRC2_T1PR, ddram_config->ddramc_t1pr);
// pSDDRC->HDDRSDRC2_T2PR
write_ddramc(ddram_controller_address, HDDRSDRC2_T2PR, ddram_config->ddramc_t2pr);
// Initialization Step 3: NOP command -> allow to enable clk
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_NOP_CMD);
*((unsigned volatile int*) ddram_address) = 0;
// Initialization Step 3 (must wait 200 us) (6 core cycles per iteration, core is at 396MHz: min 13200 loops)
for (i = 0; i < 13300; i++) {
asm(" nop");
}
// Step 4: An NOP command is issued to the DDR2-SDRAM
// NOP command -> allow to enable cke
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_NOP_CMD);
*((unsigned volatile int*) ddram_address) = 0;
// wait 400 ns min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Initialization Step 5: Set All Bank Precharge
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_PRCGALL_CMD);
*((unsigned volatile int*) ddram_address) = 0;
// wait 400 ns min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Initialization Step 6: Set EMR operation (EMRS2)
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_EXT_LMR_CMD);
*((unsigned int *)(ddram_address + 0x4000000)) = 0;
// wait 2 cycles min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Initialization Step 7: Set EMR operation (EMRS3)
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_EXT_LMR_CMD);
*((unsigned int *)(ddram_address + 0x6000000)) = 0;
// wait 2 cycles min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Initialization Step 8: Set EMR operation (EMRS1)
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_EXT_LMR_CMD);
*((unsigned int *)(ddram_address + 0x2000000)) = 0;
// wait 200 cycles min
for (i = 0; i < 10000; i++) {
asm(" nop");
}
// Initialization Step 9: enable DLL reset
cr = read_ddramc(ddram_controller_address, HDDRSDRC2_CR);
write_ddramc(ddram_controller_address, HDDRSDRC2_CR, cr | AT91C_DDRC2_DLL_RESET_ENABLED);
// Initialization Step 10: reset DLL
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_EXT_LMR_CMD);
*(((unsigned volatile int*) ddram_address)) = 0;
// wait 2 cycles min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Initialization Step 11: Set All Bank Precharge
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_PRCGALL_CMD);
*(((unsigned volatile int*) ddram_address)) = 0;
// wait 400 ns min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Initialization Step 12: Two auto-refresh (CBR) cycles are provided. Program the auto refresh command (CBR) into the Mode Register.
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_RFSH_CMD);
*(((unsigned volatile int*) ddram_address)) = 0;
// wait 10 cycles min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Set 2nd CBR
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_RFSH_CMD);
*(((unsigned volatile int*) ddram_address)) = 0;
// wait 10 cycles min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Initialization Step 13: Program DLL field into the Configuration Register to low(Disable DLL reset).
cr = read_ddramc(ddram_controller_address, HDDRSDRC2_CR);
write_ddramc(ddram_controller_address, HDDRSDRC2_CR, cr & (~AT91C_DDRC2_DLL_RESET_ENABLED));
// Initialization Step 14: A Mode Register set (MRS) cycle is issued to program the parameters of the DDR2-SDRAM devices.
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_LMR_CMD);
*(((unsigned volatile int*) ddram_address)) = 0;
// Step 15: Program OCD field into the Configuration Register to high (OCD calibration default).
cr = read_ddramc(ddram_controller_address, HDDRSDRC2_CR);
write_ddramc(ddram_controller_address, HDDRSDRC2_CR, cr | AT91C_DDRC2_OCD_DEFAULT);
// Step 16: An Extended Mode Register set (EMRS1) cycle is issued to OCD default value.
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_EXT_LMR_CMD);
*(((unsigned int*) (ddram_address + 0x2000000))) = 0;
// wait 2 cycles min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Step 17: Program OCD field into the Configuration Register to low (OCD calibration mode exit).
cr = read_ddramc(ddram_controller_address, HDDRSDRC2_CR);
write_ddramc(ddram_controller_address, HDDRSDRC2_CR, cr & (~AT91C_DDRC2_OCD_EXIT));
// Step 18: An Extended Mode Register set (EMRS1) cycle is issued to enable OCD exit.
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_EXT_LMR_CMD);
*(((unsigned int*) (ddram_address + 0x6000000))) = 0;
// wait 2 cycles min
for (i = 0; i < 100; i++) {
asm(" nop");
}
// Step 19,20: A mode Normal command is provided. Program the Normal mode into Mode Register.
write_ddramc(ddram_controller_address, HDDRSDRC2_MR, AT91C_DDRC2_MODE_NORMAL_CMD);
*(((unsigned volatile int*) ddram_address)) = 0;
// Step 21: Write the refresh rate into the count field in the Refresh Timer register. The DDR2-SDRAM device requires a
// refresh every 15.625 Is or 7.81 s. With a 100MHz frequency, the refresh timer count register must to be set with
// (15.625 /100 MHz) = 1562 i.e. 0x061A or (7.81 /100MHz) = 781 i.e. 0x030d.
// Set Refresh timer
write_ddramc(ddram_controller_address, HDDRSDRC2_RTR, ddram_config->ddramc_rtr);
// OK now we are ready to work on the DDRSDR
// wait for end of calibration
for (i = 0; i < 500; i++) {
asm(" nop");
}
return 0;
}
#endif /* CFG_DDRAM */
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \dir
/// !!!Purpose
///
/// This directory contains one module for each supported Atmel evaluation kit.
///
/// Each module provides the necessary definitions and methods for using the
/// board in a portable way. This means that there should be NO overhead when
/// porting a project from a SAM7S to a SAM7SE (for example), given that they
/// both fullfil the technical requirements of the project.
///
/// !!!Contents
/// Each board subdirectory contains board- and chip-dependant files to provide
/// a number of services:
/// - PIO definitions
/// - Memory initializations
/// - Startup and low level initialization
/// - etc.
///
/// Please refer to the documentation of each directory for more in-depth
/// description of what is available.
//------------------------------------------------------------------------------
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \dir
/// !!!Purpose
///
/// This directory contains one module for each supported Atmel evaluation kit.
///
/// Each module provides the necessary definitions and methods for using the
/// board in a portable way. This means that there should be NO overhead when
/// porting a project from a SAM7S to a SAM7SE (for example), given that they
/// both fullfil the technical requirements of the project.
///
/// !!!Contents
/// Each board subdirectory contains board- and chip-dependant files to provide
/// a number of services:
/// - PIO definitions
/// - Memory initializations
/// - Startup and low level initialization
/// - etc.
///
/// Please refer to the documentation of each directory for more in-depth
/// description of what is available.
//------------------------------------------------------------------------------
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// The AT26 Serialflash driver.
///
/// !Usage
//------------------------------------------------------------------------------
#ifndef AT26D_H
#define AT26D_H
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
#include "at26.h"
//------------------------------------------------------------------------------
// Macros
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
extern void AT26D_WaitReady(At26 *pAt26);
extern unsigned int AT26D_ReadJedecId(At26 *pAt26);
extern unsigned char AT26D_Unprotect(At26 *pAt26);
extern unsigned char AT26D_EraseChip(At26 *pAt26);
extern unsigned char AT26D_EraseBlock(At26 *pAt26, unsigned int address);
extern unsigned char AT26D_Write(
At26 *pAt26,
unsigned char *pData,
unsigned int size,
unsigned int address);
extern unsigned char AT26D_Read(
At26 *pAt26,
unsigned char *pData,
unsigned int size,
unsigned int address);
#endif // #ifndef AT26D_H
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
/// !Purpose
///
/// The AT26 Serialflash driver.
///
/// !Usage
//------------------------------------------------------------------------------
#ifndef AT26D_H
#define AT26D_H
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
#include "at26.h"
//------------------------------------------------------------------------------
// Macros
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// Exported functions
//------------------------------------------------------------------------------
extern void AT26D_WaitReady(At26 *pAt26);
extern unsigned int AT26D_ReadJedecId(At26 *pAt26);
extern unsigned char AT26D_Unprotect(At26 *pAt26);
extern unsigned char AT26D_EraseChip(At26 *pAt26);
extern unsigned char AT26D_EraseBlock(At26 *pAt26, unsigned int address);
extern unsigned char AT26D_Write(
At26 *pAt26,
unsigned char *pData,
unsigned int size,
unsigned int address);
extern unsigned char AT26D_Read(
At26 *pAt26,
unsigned char *pData,
unsigned int size,
unsigned int address);
#endif // #ifndef AT26D_H
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
///
/// !!!Purpose
///
/// The AT45 Dataflash driver is based on the corresponding AT45 driver.
/// A AT45 instance has to be initialized using the Dataflash levle function
/// AT45_Configure(). AT45 Dataflash can be automatically detected using
/// the AT45_FindDevice() function. Then AT45 dataflash operations such as
/// read, write and erase DF can be launched using AT45_SendCommand function
/// with corresponding AT45 command set.
///
/// !!!Usage
///
/// -# Reads data from the At45 at the specified address using AT45D_Read().
/// -# Writes data on the At45 at the specified address using AT45D_Write().
/// -# Erases a page of data at the given address using AT45D_Erase().
/// -# Poll until the At45 has completed of corresponding operations using
/// AT45D_WaitReady().
/// -# Retrieves and returns the At45 current using AT45D_GetStatus().
//------------------------------------------------------------------------------
#ifndef AT45D_H
#define AT45D_H
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
#include "at45.h"
//------------------------------------------------------------------------------
// Global functions
//------------------------------------------------------------------------------
extern void AT45D_WaitReady(At45 *pAt45);
extern unsigned char AT45D_GetStatus(At45 *pAt45);
extern void AT45D_Read(
At45 *pAt45,
unsigned char *pBuffer,
unsigned int size,
unsigned int address);
extern void AT45D_Write(
At45 *pAt45,
unsigned char *pBuffer,
unsigned int size,
unsigned int address);
extern void AT45D_Erase(At45 *pAt45, unsigned int address);
extern void AT45D_BinaryPage(At45 *pAt45);
#endif //#ifndef AT45D_H
/* ----------------------------------------------------------------------------
* ATMEL Microcontroller Software Support
* ----------------------------------------------------------------------------
* Copyright (c) 2008, Atmel Corporation
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the disclaimer below.
*
* Atmel's name may not be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* ----------------------------------------------------------------------------
*/
//------------------------------------------------------------------------------
/// \unit
///
/// !!!Purpose
///
/// The AT45 Dataflash driver is based on the corresponding AT45 driver.
/// A AT45 instance has to be initialized using the Dataflash levle function
/// AT45_Configure(). AT45 Dataflash can be automatically detected using
/// the AT45_FindDevice() function. Then AT45 dataflash operations such as
/// read, write and erase DF can be launched using AT45_SendCommand function
/// with corresponding AT45 command set.
///
/// !!!Usage
///
/// -# Reads data from the At45 at the specified address using AT45D_Read().
/// -# Writes data on the At45 at the specified address using AT45D_Write().
/// -# Erases a page of data at the given address using AT45D_Erase().
/// -# Poll until the At45 has completed of corresponding operations using
/// AT45D_WaitReady().
/// -# Retrieves and returns the At45 current using AT45D_GetStatus().
//------------------------------------------------------------------------------
#ifndef AT45D_H
#define AT45D_H
//------------------------------------------------------------------------------
// Headers
//------------------------------------------------------------------------------
#include "at45.h"
//------------------------------------------------------------------------------
// Global functions
//------------------------------------------------------------------------------
extern void AT45D_WaitReady(At45 *pAt45);
extern unsigned char AT45D_GetStatus(At45 *pAt45);
extern void AT45D_Read(
At45 *pAt45,
unsigned char *pBuffer,
unsigned int size,
unsigned int address);
extern void AT45D_Write(
At45 *pAt45,
unsigned char *pBuffer,
unsigned int size,
unsigned int address);
extern void AT45D_Erase(At45 *pAt45, unsigned int address);
extern void AT45D_BinaryPage(At45 *pAt45);
#endif //#ifndef AT45D_H
bin/
obj/
\ No newline at end of file
#!/bin/sh
make CROSS_COMPILE=/home/slayer/gnuarm-3.4.3/bin/arm-elf- CHIP=at91sam9263 BOARD=at91sam9263-ek MEMORIES=sdram INSTALLDIR=../../ clean all
\ No newline at end of file
make CROSS_COMPILE=/opt/gcc-codesourcery/bin/arm-none-eabi- CHIP=at91sam9g45 BOARD=at91sam9g45-ek MEMORIES=sram TRACE_LEVEL=5 DYN_TRACES=1 INSTALLDIR=../../ clean all
\ No newline at end of file
#!/bin/sh
make CROSS_COMPILE=/home/slayer/gnuarm-3.4.3/bin/arm-elf- CHIP=at91sam9263 BOARD=at91sam9263-ek MEMORIES=sram DYN_TRACES=1 INSTALLDIR=../../ clean all
\ No newline at end of file
make CROSS_COMPILE=/opt/gcc-codesourcery/bin/arm-none-eabi- CHIP=at91sam9g45 BOARD=at91sam9g45-ek MEMORIES=sram TRACE_LEVEL=5 DYN_TRACES=1 INSTALLDIR=../../ clean all
\ No newline at end of file
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