Commit 8c79c6a0 authored by Grzegorz Daniluk's avatar Grzegorz Daniluk

doc: adding little text about LPDC

parent b3fb2ec6
...@@ -183,13 +183,17 @@ to a number of improvements in configuration and slight changes in ...@@ -183,13 +183,17 @@ to a number of improvements in configuration and slight changes in
the behavior of the WR Switch. Here are highlights: the behavior of the WR Switch. Here are highlights:
@itemize @itemize
@item @b{Low Phase Drift Calibration (LPDC)} [placeholder for Greg] @item @b{Low Phase Drift Calibration (LPDC)}
The LPDC requires rx and tx calibration of each port. The tx calibration is performed Low Phase Drift Calibration is a new feature added in release v6.0 that
once for all ports at startup of the WR switch. The tx calibration is perform improves phase stability between WR switch restarts to <10ps. Due to FPGA
each time a link goes up on a port (e.g. cable is connected). Rx and tx limitations this functionality is present only on ports 1-12.
calibration is indicated by blinking of @i{Link/WR Mode} LED (left). The LPDC requires an additional, automated calibration procedure to run for Tx
Note that the calibration makes startup of the WR switch significantly longer. and Rx path of each affected FPGA transceiver. The Tx calibration is performed
once for all ports at startup of the WR switch. The Rx calibration is performed
each time a link goes up on a port. Both Tx and Rx calibration is indicated by
blinking of @i{Link/WR Mode} LED (left).
The downside is that the calibration makes startup of the WR switch longer.
Similarly, the time between connecting a fiber and the link going up Similarly, the time between connecting a fiber and the link going up
(e.g. as observed in @i{wr_mon}) is noticeably longer. (e.g. as observed in @i{wr_mon}) is noticeably longer.
......
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