New facility added to control a timer used to schedule the different
action in HAL. This facility is used to accelerate the processing of the
FSM during the TX and RX calibrations.

This new state is used by PPSi the end of the initialization of all
ports before starting to change the timing mode. This is particularly
the case for the GM mode which is set during the initialization of PPSi.

- HAL shared memory modified to hide and remove some dependencies not
needed by PPSi
- LPDC structures are now stored in HAL shared memory. They are then
accessible by the share memory dump tool
- Improve the initialization procedure

Tollerance replaced by tolerance.

_hal_port_tx_setup_state_wait_other_ports() was not returning a value.

The writing must be done by the first LPDC-supporting port after all
the LPDC-supporting ports have been calibrated. Thus, this must be
done in the new state HAL_PORT_TX_SETUP_STATE_WAIT_OTHER_PORTS and
only the first port. Otherwise, we have problem when looping through
all the supporting ports. In particular, the writing must be done for
all LPDC-supporting ports, if we start looping on port N (by ++pointer),
then we will not cover all ports, unless we loop up (++) and (--)
down.

- point on all ports (with and without LPDC support) to the global
  LPDC structure, this is so that all ports can see whether the LPDC
  ports were all calibrated
- add new state to tx_setup FSM in which ports wait for all the
  LPDC-supported ports to finish calibration

All ports (with and without support) need to wait for LPDC calibartion
to finish because otherwise one of them could become slave and
change the timing_mode while LPDC requires the switch to be in
free-running master mode

- use new version of mini-rpc (less overhead on RT communication polling)
- adjust DMTD averaging interval (shorter for calibration -> speedup)
- make sure the PLL works in freemaster mode before starting calibration
- release control over ports to HAL only after all ports have finished the TX path calibration

After unplugging fiber, the early_link_up flag is cleared a bit later
than the detection of link_down happens. This resulted in the tx_setup
state machine trying to calibrate unplugged link. The things worked
because the FSM would hang in wait_lock state and then timeout. Yet,
this did not seem the best solution. So, I added timeout to wait
for the early_link_up bit to be cleared

If there were more ports connected than just slave port, unplugging any
of the ports would result (on BC) the timing_mode to be changed to
FREE_MASTER. As a consquence, the port in slave state was reseted and
would re-establishs sync. It was fixed by checking whether the unplugged
port was slave (i.e. was locked)

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

userspace: add optional Makefile.specific included in the main makefiles to provide user-specific build configuration

This is copy+paste+cleanup/fixes of what Tom developed in the branch
tom-v6-determinism-5.0.1.

[HAL] remove HAL_PORT_RX_SETUP_STATE_CALIB_NO_LPDC from hal_port_fsm_rx and move bitslide measurement

Rational: when LPDC is done, we need to wait for link_up (the
early_link_up is already set). There can be potentially time
when we are in the HAL_PORT_RX_SETUP_STATE_DONE done state and
the early_link_up=1 while link_up=0. This forces a bit different
behavior for the LPDC and non-LPDC behavior. The new approarch:
- if no LPDC, go directly to HAL_PORT_RX_SETUP_STATE_DONE and
  wait there for link_up
- if LPDC, do the all the necessary stuff and then wait for
  link_up in HAL_PORT_RX_SETUP_STATE_DONE
The bitslide measurement could be done only for non-LPDC, yet
there is no harm in reading the bitslide register in all cases,
it is hardcoded to zero when LPDC is supported. Doing it
outside the hal_port_fsm_rx is more similar to what was in the
original HAL, furthermore, bitslide measurement was there before
LPDC, so it can be considered somehow independent

As it is now, once the port with index=0 is calibrated, the
_pll_state is never updated. Also, since the states are called
recursively in case new state is entered, the _pll_state is not
updated unless this is called on port with index=0.

Trying to call it regardless of the port before implementing
complicated mechanism to manage updates once per all ports under
calibration.

- add timeout for tx calibration to overcome bugs in reading info from SoftPLL
- change initial calibration tolerance
- come changes in prints

- changed update of _pll_state to be done when the FSM is called on
  the first LPCD-supported port, not assuming its index is 0
- added disabling of phase tracking that was missing

- use the global LPDC structure to know whether the file is
  read/synched (instead of the hack that was used so far)
- rename the variables/function name to be more self-explanatory

- for tx setup, we need to do some stuff for only one port and
  we need to do other stuff when all ports are calibrated, yet
  we need to know this global information when executing on a
  port.
- Added structure to the hal_ports_t that is pointed to from
  each port that supports LPDC. This structure is then updated
  and checked.
- use this stucture to do the following:
  * execute update of _pll_state only when hal_port_fsm_tx is
    executed on the first port that supports LPDC (it does not
    need to be port with index 0)
  * execute writing configuration file when all LPDC-supporting
    port has finished the tx_setup

If already exists, the file needs to be read once for all ports and
the structures of the ports need to be updated. this is better done
at the very begining for all ports rather then making a hack and
executing it when port_index=0. Thus, move the thing to the initial
global init.

These defines are used only in HAL

- regardless whether LPDC is supported or not, some calibration
  flags need to be set, more over some of them have tx in name,
  so setting them in hal_port_rx_setup_state_fsm() is messy. So..
- set any LPDC-irrelevant flags in the port_fsm when link_up
- make sure the value of bitslide is cleared when link_down
- measure bitslide only in NO_LPDC state, otherwise leave it zero

needed for wr_mon to display things correctly

This is a implementation of the Low Phase Drift Calibration based on
Tom's work (branch tom-v6-determinism-5.0.1)
This commit has not been tested. It just compiles.

NOTE: work ported from Tom's commits on Low Phase Drift Calibration