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wr2rf-vme
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2231d6c4
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2231d6c4
authored
Mar 09, 2023
by
Tristan Gingold
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README
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2231d6c4
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@@ -15,10 +15,16 @@ changes.
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@@ -15,10 +15,16 @@ changes.
- Once the project has instantiated + annotated the block design: click "Run Synthesis", takes ~1.5 hours
- Once the project has instantiated + annotated the block design: click "Run Synthesis", takes ~1.5 hours
- When finished, open "Synthesized Design"
- When finished, open "Synthesized Design"
- Export an RTL netlist: File->Export->Netlist
- Export an RTL netlist: File->Export->Netlist
- Export a block design Wrappers:
- Export a block design Wrappers:
To build wr2rf-vme it references, via hdl/rtl/rfnco/Manifest.py two files. They must be present otherwise it won't work...
To build wr2rf-vme it references, via hdl/rtl/rfnco/Manifest.py two files. They must be present otherwise it won't work...
Origin: https://gitlab.cern.ch/BE-RF-PLDesign/Libraries/xilinx/RFNCO.git
In case of TCL error by vivado on run_ippack.tcl, cf:
https://support.xilinx.com/s/article/76960?language=en_US
==================
==================
nonIQModInterp2FIR
nonIQModInterp2FIR
==================
==================
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@@ -32,9 +38,8 @@ changes.
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@@ -32,9 +38,8 @@ changes.
- Once the project has instantiated + annotated the block design: click "Run Synthesis", takes ~20 mins
- Once the project has instantiated + annotated the block design: click "Run Synthesis", takes ~20 mins
- When finished, open "Synthesized Design"
- When finished, open "Synthesized Design"
- Export an RTL netlist: File->Export->Netlist
- Export an RTL netlist: File->Export->Netlist
- Export a block design Wrappers:
- Export a block design Wrappers:
set_property target_language VHDL [current_project]
make_wrapper -files [get_files Work/nonIQModInterp2FIR.srcs/sources_1/bd/nonIQModInterp2FIR/nonIQModInterp2FIR.bd] -top
To build wr2rf-vme it references, via hdl/rtl/noniqmodinterp2fir/Manifest.py two files. They must be present otherwise it won't work...
To build wr2rf-vme it references, via hdl/rtl/noniqmodinterp2fir/Manifest.py two files. They must be present otherwise it won't work...
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