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wr2rf-vme
Commits
82842f23
Commit
82842f23
authored
Apr 05, 2023
by
Tristan Gingold
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WIP: add support for wrpc-v5
parent
8c74c13a
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7 changed files
with
40 additions
and
21 deletions
+40
-21
.gitmodules
.gitmodules
+3
-0
urv-core
dependencies/urv-core
+1
-0
wr-cores
dependencies/wr-cores
+1
-1
Manifest.py
hdl/top/wr2rf_vme/Manifest.py
+1
-0
wr2rf_vme.vhd
hdl/top/wr2rf_vme/wr2rf_vme.vhd
+2
-2
Makefile
software/libwr2rf/Makefile
+2
-2
wr2rf.c
software/libwr2rf/wr2rf.c
+30
-16
No files found.
.gitmodules
View file @
82842f23
...
...
@@ -28,3 +28,6 @@
[submodule "dependencies/stdinfo"]
path = dependencies/stdinfo
url = https://gitlab.cern.ch/BE-RF-PLDesign/memorymaps/stdinfo.git
[submodule "dependencies/urv-core"]
path = dependencies/urv-core
url = https://ohwr.org/project/urv-core.git
urv-core
@
802c1532
Subproject commit 802c1532a077b801b111f7d45be5c86e6792e023
wr-cores
@
978c11a8
Subproject commit
28191b5ad27dbdf2593865e61a5d013a30d65a95
Subproject commit
978c11a84e3e5f14e8a07313a99bcafaad7fe932
hdl/top/wr2rf_vme/Manifest.py
View file @
82842f23
...
...
@@ -12,4 +12,5 @@ modules = {'local': [ '../../rtl',
'git'
:
[
"git://ohwr.org/project/general-cores.git"
,
"git://ohwr.org/project/vme64x-core.git"
,
"git://ohwr.org/project/wr-cores.git"
,
"git://ohwr.org/project/urv-core.git"
,
"https://gitlab.cern.ch/BE-RF-PLDesign/Libraries/xilinx/RFFrameTransceiver.git"
]
}
hdl/top/wr2rf_vme/wr2rf_vme.vhd
View file @
82842f23
...
...
@@ -43,8 +43,8 @@ entity wr2rf_vme is
generic
(
g_simulation
:
integer
:
=
0
;
g_dpram_size
:
integer
:
=
131072
/
4
;
g_dpram_initf
:
string
:
=
"../../../../dependencies/wrpc-sw
/wrc-wr2rf-enabled-snmp-and-auxdiags.bram"
;
--
g_dpram_initf : string := "";
-- g_dpram_initf : string := "../../../../dependencies/wrpc-sw-file
/wrc-wr2rf-enabled-snmp-and-auxdiags.bram";
g_dpram_initf
:
string
:
=
""
;
g_diag_id
:
integer
:
=
0
;
g_diag_ver
:
integer
:
=
0
;
g_diag_ro_size
:
integer
:
=
0
;
...
...
software/libwr2rf/Makefile
View file @
82842f23
...
...
@@ -3,8 +3,8 @@ VMEBRIDGE=/acc/local/L867/drv/vmebus/1.0.1
PREFIX
=
/usr/local
CC
=
gcc
CFLAGS
=
-g
-O
-Wall
--std
=
gnu99
-I
$(VMEBRIDGE)
/include
/vmebus
-I
../include
LDFLAGS
=
$(VMEBRIDGE)
/lib/libvmebus.a
-l
rt
-lm
CFLAGS
=
-g
-O
-Wall
--std
=
gnu99
-I
$(VMEBRIDGE)
/include
-I
../include
LDFLAGS
=
$(VMEBRIDGE)
/lib/libvmebus.a
-l
m
-static
OBJS_LIB
=
init.o board.o oc_spi16.o ad9910_init.o dac_timing.o
OBJS_HOST
=
host.o
...
...
software/libwr2rf/wr2rf.c
View file @
82842f23
...
...
@@ -23,6 +23,13 @@
/* [0x10]: REG Hardware Info Register */
#define SYSC_REG_HWIR 0x00000010
/* [0x0]: REG Core Reset Register */
#define WRC_CPU_CSR_REG_RESET 0x00000000
/* [0x4]: REG Core Upload Address Register */
#define WRC_CPU_CSR_REG_UADDR 0x00000004
/* [0x8]: REG Core Upload Data Register */
#define WRC_CPU_CSR_REG_UDATA 0x00000008
struct
xlat_tab
{
const
char
*
name
;
unsigned
val
;
...
...
@@ -1144,10 +1151,14 @@ vuart (struct libwr2rf_dev *dev, int argc, char **argv)
/* Print all the incoming charactes */
while
(
1
)
{
int
r
;
rx
=
wr_vuart_rx
(
dev
);
if
(
rx
==
-
1
)
break
;
write
(
1
,
&
rx
,
1
);
r
=
write
(
1
,
&
rx
,
1
);
if
(
r
<
0
)
break
;
}
}
...
...
@@ -1201,12 +1212,12 @@ fw_dump (struct libwr2rf_dev *dev, int argc, char **argv)
}
static
unsigned
*
static
unsigned
char
*
load_binary_file
(
const
char
*
filename
,
long
*
size
)
{
int
i
;
long
sz
;
unsigned
*
buf
;
unsigned
char
*
buf
;
FILE
*
f
;
f
=
fopen
(
filename
,
"r"
);
...
...
@@ -1252,31 +1263,34 @@ load_binary_file(const char *filename, long *size)
static
void
load_wrs_firmware
(
struct
libwr2rf_dev
*
dev
,
const
char
*
filename
)
{
unsigned
*
buf
;
unsigned
char
*
buf
;
long
sz
;
buf
=
load_binary_file
(
filename
,
&
sz
);
if
(
buf
==
NULL
)
return
;
/* Reset LM32. */
libwr2rf_be_write32
(
dev
,
WR2RF_VME_REGS_INIT
+
WR2RF_INIT_REGS_WRC_PAGE0
,
0x40000
);
libwr2rf_wrc_write32
(
dev
,
0x400
,
0x1deadbee
);
while
(
!
(
libwr2rf_wrc_read32
(
dev
,
0x400
)
&
0x10000000
))
;
/* Reset uRV. */
libwr2rf_wrc_write32
(
dev
,
0xb00
+
WRC_CPU_CSR_REG_RESET
,
1
<<
0
);
/* Load. */
for
(
unsigned
i
=
0
;
i
<
sz
;
i
+=
4
)
{
unsigned
v
=
htonl
(
buf
[
i
>>
2
]);
for
(
unsigned
addr
=
0
;
addr
<
sz
;
addr
+=
4
)
{
uint32_t
v
;
libwr2rf_wrc_write32
(
dev
,
0xb00
+
WRC_CPU_CSR_REG_UADDR
,
addr
>>
2
);
if
((
i
&
0xfff
)
==
0
)
libwr2rf_be_write32
(
dev
,
WR2RF_VME_REGS_INIT
+
WR2RF_INIT_REGS_WRC_PAGE1
,
i
&
(
~
0xfff
));
libwr2rf_wrc_write32
(
dev
,
0x1000
+
(
i
&
0xfff
),
v
);
//buf[i >> 2]);
/* Use BE. */
v
=
(
buf
[
addr
+
3
]
<<
0
)
|
(
buf
[
addr
+
2
]
<<
8
)
|
(
buf
[
addr
+
1
]
<<
16
)
|
(
buf
[
addr
+
0
]
<<
24
);
libwr2rf_wrc_write32
(
dev
,
0xb00
+
WRC_CPU_CSR_REG_UDATA
,
v
);
}
/* Unreset. */
libwr2rf_wrc_write32
(
dev
,
0x400
,
0x0deadbee
);
libwr2rf_wrc_write32
(
dev
,
0xb00
+
WRC_CPU_CSR_REG_RESET
,
0
);
free
(
buf
);
}
static
void
...
...
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