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wr2rf-vme
Commit 8b550c3a authored by John Robert Gill's avatar John Robert Gill
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Added missing page setup sequence to access wishbone bus behind WRC memory map.

parent 589ee702
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software/libwr2rf/init.c
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......@@ -267,6 +267,7 @@ libwr2rf_set_wrs_fixed_latency (struct libwr2rf_dev *dev, unsigned wr_cycles)
unsigned cfg5_addr = 0x74; // STREAMERS_RX_CFG5 - fixed latency, # of 8ns clock cycles
unsigned cfg_addr = 0x78; // STREAMERS_CFG for accessing Tx/Rx overide
libwr2rf_be_write32(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_WRC_PAGE0, 0x48000);
libwr2rf_wrc_write32(dev, cfg5_addr, wr_cycles);
libwr2rf_wrc_write32(dev, cfg_addr, (1 << 21));
}
......@@ -286,6 +287,7 @@ libwr2rf_set_wrs_timeout_latency (struct libwr2rf_dev *dev, unsigned wr_cycles)
unsigned cfg6_addr = 0xa4; // STREAMERS_RX_CFG6 - fixed latency timeout
unsigned cfg_addr = 0x78; // STREAMERS_CFG for accessing Tx/Rx overide
libwr2rf_be_write32(dev, WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_WRC_PAGE0, 0x48000);
libwr2rf_wrc_write32(dev, cfg6_addr, wr_cycles);
libwr2rf_wrc_write32(dev, cfg_addr, (1 << 21));
}
......
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