Commit 8d1971e0 authored by John Robert Gill's avatar John Robert Gill

added rf_reset_offset to api_init + updated release number

parent 7ab6dc40
......@@ -229,7 +229,7 @@ unsigned libwr2rf_read_fwversion(struct libwr2rf_dev *dev)
int libwr2rf_check_fwversion(struct libwr2rf_dev *dev)
{
return !(libwr2rf_read_fwversion(dev) == 0x00001000);
return !(libwr2rf_read_fwversion(dev) == 0x00001100);
}
void libwr2rf_read_nco_ipinfo(struct libwr2rf_dev *dev,
......@@ -1010,6 +1010,30 @@ int libwr2rf_vtu_nco_reset_delay (struct libwr2rf_dev *dev, unsigned id,
return 0;
}
int libwr2rf_vtu_rf_reset_offset (struct libwr2rf_dev *dev, unsigned id, unsigned wr_cycles)
{
unsigned addr = 0;
addr += WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_RF;
switch (id)
{
case LIBWR2RF_RF1_CHANNEL_ID:
addr = addr + WR2RF_INIT_RF_REGS_RF1;
break;
case LIBWR2RF_RF2_CHANNEL_ID:
addr = addr + WR2RF_INIT_RF_REGS_RF2;
break;
default:
return LIBWR2RF_ERROR_BAD_ID;
}
addr += WR2RF_INIT_RF_CH_REGS_RST_CDELAY;
libwr2rf_write16(dev, addr, wr_cycles);
return 0;
}
int libwr2rf_ioupdate_delay (struct libwr2rf_dev *dev,
unsigned fdelay, unsigned odelay)
{
......
......@@ -266,6 +266,9 @@ libwr2rf_api_init (struct libwr2rf_dev *dev)
libwr2rf_vtu_nco_reset_delay(dev, LIBWR2RF_RF1_CHANNEL_ID, 75, 5, 0xa);
libwr2rf_vtu_nco_reset_delay(dev, LIBWR2RF_RF2_CHANNEL_ID, 75, 4, 0x14);
/* Set the rf reset offset delay wrt nco_reset_cdelayed */
libwr2rf_vtu_rf_reset_offset(dev, LIBWR2RF_RF1_CHANNEL_ID, 10);
libwr2rf_vtu_rf_reset_offset(dev, LIBWR2RF_RF2_CHANNEL_ID, 10);
return 0;
}
......
......@@ -66,4 +66,7 @@ void libwr2rf_vtu_dump_by_addr(struct libwr2rf_dev *dev, unsigned addr);
const char *libwr2rf_vtu_get_mode_by_index(unsigned idx);
int libwr2rf_vtu_get_mode_by_name(const char *name);
/* Set the rf reset offset delay wrt nco_reset_cdelayed */
int libwr2rf_vtu_rf_reset_offset (struct libwr2rf_dev *dev, unsigned id, unsigned wr_cycles);
#endif /* __BOARD_H_ */
......@@ -464,6 +464,7 @@ rf_reset_offset (struct libwr2rf_dev *dev, int argc, char **argv)
if (argc != 2 && argc != 3 && argc != 4 && argc != 5)
goto usage;
addr += WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_RF;
if (strcmp(argv[1], "1") == 0) {
ch = 1;
addr += WR2RF_INIT_RF_REGS_RF1;
......@@ -478,7 +479,7 @@ rf_reset_offset (struct libwr2rf_dev *dev, int argc, char **argv)
else if (argc == 3)
delay = strtoul(argv[2], NULL, 0);
addr += WR2RF_VME_REGS_INIT + WR2RF_INIT_REGS_RF + WR2RF_INIT_RF_CH_REGS_RST_CDELAY;
addr += WR2RF_INIT_RF_CH_REGS_RST_CDELAY;
printf("Your delay=%d\n", delay);
if (argc == 3) {
......@@ -3905,8 +3906,8 @@ calib_vtu (struct libwr2rf_dev *dev, int argc, char **argv)
}
printf ("clear VTU FF reset\n");
libwr2rf_vtu_reset (dev, ch + 0, 0);
libwr2rf_vtu_reset (dev, ch + 1, 0);
libwr2rf_vtu_output_reset (dev, ch + 0, 0);
libwr2rf_vtu_output_reset (dev, ch + 1, 0);
while (1) {
libwr2rf_vtu_softstop (dev, ch + 0);
......@@ -3976,7 +3977,7 @@ static struct cmds cmds[] =
{ "nco-source", nco_source, "select nco source" },
{ "nco-reset", nco_reset, "force a nco reset from software" },
{ "nco-reset-delay", nco_reset_delay, "Delay the application of nco reset into the T1 trigger units until stable RF is present. 1->128 cycles at 16ns each" },
{ "rf-reset-offset", rf_reset_offset, "Ahhhhhhhh" },
{ "rf-reset-offset", rf_reset_offset, "Set the rf reset offset delay wrt nco_reset_cdelayed" },
{ "nco-reset-ctrl", nco_reset_ctrl, "Provides masks to prevent nco_reset being distributed to DDS and RFNCOs"},
{ "nco-wrctrl", nco_wrctrl, "write nco ctrl register" },
{ "nco-lcfg", nco_lcfg, "directly configures the rfnco for local (debug) register access" },
......
......@@ -15,17 +15,19 @@ ftw_hex=`echo "obase=16;ibase=10; $ftw_h1" | bc -q`
# can be used to "simulate" a cycle of the sps. The slot numbers used are specific to cfv-774-celma4
# card configuration and should be adapted...
# slot 2 is TX, slots 4+5 RX
./wr2rf -s 2 tmgclk-oe 0x3
./wr2rf -s 2 tmgclk-term 0x0
./wr2rf -s 2 lemo-dbg-sel tmgclk1 rf_rst
./wr2rf -s 2 lemo-dbg-sel tmgio4 rf1_nco_reset_cdelayed
./wr2rf -s 2 lemo-dbg-sel tmgclk2 rf2_nco_reset_cdelayed
./wr2rf -s 2 api-vtu-reset 1.1 1
./wr2rf -s 2 api-vtu-reset 1.1 0
./wr2rf -s 2 vtu-out 1.1 trig_reset 0
./wr2rf -s 2 api-vtu-reset 2.1 1
./wr2rf -s 2 api-vtu-reset 2.1 0
./wr2rf -s 2 vtu-out 2.1 trig_reset 0
./wr2rf -s 4 tmgclk-oe 0x3
./wr2rf -s 4 tmgclk-term 0x0
./wr2rf -s 4 lemo-dbg-sel tmgclk1 rf_rst
./wr2rf -s 4 lemo-dbg-sel tmgio4 rf1_nco_reset_cdelayed
./wr2rf -s 4 lemo-dbg-sel tmgclk2 rf2_nco_reset_cdelayed
./wr2rf -s 4 api-vtu-reset 1.1 1
./wr2rf -s 4 api-vtu-reset 1.1 0
./wr2rf -s 4 vtu-out 1.1 trig_reset 0
./wr2rf -s 4 api-vtu-reset 2.1 1
./wr2rf -s 4 api-vtu-reset 2.1 0
./wr2rf -s 4 vtu-out 2.1 trig_reset 0
./wr2rf -s 4 api-vtu-invalidate 1.1
./wr2rf -s 4 api-vtu-invalidate 2.1
./wr2rf -s 5 tmgclk-oe 0x3
./wr2rf -s 5 tmgclk-term 0x0
......@@ -34,26 +36,27 @@ ftw_hex=`echo "obase=16;ibase=10; $ftw_h1" | bc -q`
./wr2rf -s 5 lemo-dbg-sel tmgclk2 rf2_nco_reset_cdelayed
./wr2rf -s 5 api-vtu-reset 1.1 1
./wr2rf -s 5 api-vtu-reset 1.1 0
./wr2rf -s 5 api-vtu-invalidate 1.1
./wr2rf -s 5 api-vtu-invalidate 2.1
./wr2rf -s 5 vtu-out 1.1 trig_reset 0
./wr2rf -s 5 api-vtu-reset 2.1 1
./wr2rf -s 5 api-vtu-reset 2.1 0
./wr2rf -s 5 vtu-out 2.1 trig_reset 0
# reset the RX wr2rf trigger unit
while true; do
b=`echo $(( $RANDOM % 10000 ))`
b=`expr $b + 16`
# echo "$b"
./wr2rf -s 2 api-vtu-softstop 1.1
./wr2rf -s 2 api-vtu-softstop 2.1
./wr2rf -s 4 api-vtu-softstop 1.1
./wr2rf -s 4 api-vtu-softstop 2.1
./wr2rf -s 5 api-vtu-softstop 1.1
./wr2rf -s 5 api-vtu-softstop 2.1
./wr2rf -s 2 api-vtu-window 1.1 $b 4620 1
./wr2rf -s 2 api-vtu-window 2.1 $b 4620 1
./wr2rf -s 2 api-vtu-softstart 1.1
./wr2rf -s 2 api-vtu-softstart 2.1
./wr2rf -s 4 api-vtu-window 1.1 $b 4620 1
./wr2rf -s 4 api-vtu-window 2.1 $b 4620 1
./wr2rf -s 4 api-vtu-softstart 1.1
./wr2rf -s 4 api-vtu-softstart 2.1
./wr2rf -s 5 api-vtu-window 1.1 $b 4620 1
./wr2rf -s 5 api-vtu-window 2.1 $b 4620 1
......@@ -62,7 +65,7 @@ while true; do
usleep 10
./wr2rf -s 4 ftw-send1 0x$ftw_hex reset
./wr2rf -s 2 ftw-send1 0x$ftw_hex reset
usleep 5000
done;
......
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