Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
W
wr2rf-vme
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
5
Issues
5
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
wr2rf-vme
Issues
Open
5
Closed
87
All
92
New issue
Recent searches
Press Enter or click to search
{{hint}}
{{tag}}
{{name}}
@{{username}}
No Assignee
{{name}}
@{{username}}
No Milestone
Upcoming
Started
{{title}}
No Label
{{title}}
{{name}}
Yes
No
Due date
Priority
Created date
Last updated
Milestone
Due date
Popularity
Label priority
SI/PI: check IR drop for the core FPGA power rail PDN
#52
· opened
Oct 19, 2020
by
Tomasz Wlostowski
important
CLOSED
1
updated
Oct 19, 2020
Series resistors and buffers on VME P0 TTL lines
#7
· opened
Apr 25, 2020
by
Dimitris Lampridis
Schematic done
hdl
hw
minor
xdc update
CLOSED
8
updated
Jun 29, 2020
R357 has vias placed on the pads
#54
· opened
Oct 19, 2020
by
Tomasz Wlostowski
CLOSED
1
updated
Oct 19, 2020
Fix M12V connections around IC86
#49
· opened
Oct 19, 2020
by
Tomasz Wlostowski
important
CLOSED
1
updated
Oct 19, 2020
DELAY_OEN pullups could go to P1V8_VCCO
#51
· opened
Oct 19, 2020
by
Tomasz Wlostowski
CLOSED
1
updated
Oct 19, 2020
Front panel connections
#24
· opened
May 12, 2020
by
Gregoire Hagmann
Schematic done
hw
question
CLOSED
5
updated
Jul 07, 2020
Main RF generation
#33
· opened
May 13, 2020
by
Gregoire Hagmann
Schematic done
hw
question
CLOSED
3
updated
Jun 09, 2020
Check terminations on shared SPI lines
#8
· opened
Apr 25, 2020
by
Dimitris Lampridis
Schematic done
hw
important
CLOSED
1
updated
Jun 09, 2020
consider using an INA240 for the OCXO current sense
#27
· opened
May 12, 2020
by
Christos Gentsos
Schematic done
hw
minor
CLOSED
2
updated
Jun 10, 2020
10Mhz out: from pll or from fpga ?
#41
· opened
May 20, 2020
by
Tristan Gingold
hdl
hw
question
CLOSED
4
updated
Jun 16, 2020
Faster buffers for front panel I/O
#17
· opened
May 11, 2020
by
Tom Levens
Schematic done
hdl
hw
important
xdc update
CLOSED
7
updated
Jun 29, 2020
could remove VME_A_DIR and VME_LWORD_N
#18
· opened
May 12, 2020
by
Tristan Gingold
Schematic done
cosmetics
hw
CLOSED
1
updated
Jun 08, 2020
Verify that the BE-RF VME crate power supplies can deliver enough current on P1
#4
· opened
Apr 25, 2020
by
Dimitris Lampridis
Schematic done
critical
hw
CLOSED
26
updated
Jul 07, 2020
Dielectric of ceramic capacitors in the RF path
#34
· opened
May 13, 2020
by
Tomasz Wlostowski
Schematic done
hw
important
CLOSED
3
updated
Jun 10, 2020
Inconsistent pull-down for VME_RETRY_OE and VME_A_OE_N
#19
· opened
May 12, 2020
by
Tristan Gingold
Schematic done
hw
question
CLOSED
1
updated
Jun 08, 2020
Fix Altium warning regarding IO and power pins on GND
#6
· opened
Apr 25, 2020
by
Dimitris Lampridis
Schematic done
hw
minor
CLOSED
2
updated
Apr 26, 2020
Solve wr-cores dependency
#13
· opened
Apr 27, 2020
by
Dimitris Lampridis
hdl
important
CLOSED
3
updated
Jun 09, 2020
VME connector issues
#15
· opened
May 11, 2020
by
Tom Levens
Schematic done
hw
CLOSED
1
updated
Jun 06, 2020
SFP LEDs are on when FPGA is not programmed
#70
· opened
Dec 14, 2020
by
Dimitris Lampridis
Layout V2
hw
minor
CLOSED
2
updated
Feb 05, 2021
Are we ok with 128Mbit flash?
#11
· opened
Apr 25, 2020
by
Dimitris Lampridis
Schematic done
hw
question
CLOSED
3
updated
Apr 27, 2020
Prev
1
2
3
4
5
Next
Last »