Commit 2c948468 authored by li hongming's avatar li hongming

make clk out(OUT9 of AD9516) to output 10MHz.

parent d195ca30
...@@ -257,7 +257,7 @@ int ad9516_init(int scb_version) ...@@ -257,7 +257,7 @@ int ad9516_init(int scb_version)
ad9516_set_output_divider(oc_spi_base, 3, 4, 0); // OUT3. 187.5 MHz. - not anymore ad9516_set_output_divider(oc_spi_base, 3, 4, 0); // OUT3. 187.5 MHz. - not anymore
ad9516_set_output_divider(oc_spi_base, 4, 1, 0); // OUT4. 500 MHz. ad9516_set_output_divider(oc_spi_base, 4, 1, 0); // OUT4. 500 MHz.
ad9516_set_output_divider(oc_spi_base, 9, 4,0); // OUT9. 125 MHz. // ad9516_set_output_divider(oc_spi_base, 9, 50, 0); // OUT9. 125 MHz.
/*The following PLL outputs have been configured through the ad9516_base_config_34 register, /*The following PLL outputs have been configured through the ad9516_base_config_34 register,
* so it doesn't need to replicate the configuration: * so it doesn't need to replicate the configuration:
......
...@@ -130,10 +130,10 @@ const struct ad9516_reg ad9516_base_config_34[] = { ...@@ -130,10 +130,10 @@ const struct ad9516_reg ad9516_base_config_34[] = {
{0x019B, 0x11}, {0x019B, 0x11},
{0x019C, 0x20}, {0x019C, 0x20},
{0x019D, 0x00}, {0x019D, 0x00},
{0x019E, 0x33}, {0x019E, 0x00},
{0x019F, 0x00}, {0x019F, 0x00},
{0x01A0, 0x11}, {0x01A0, 0xCB},
{0x01A1, 0x20}, {0x01A1, 0x00},
{0x01A2, 0x00}, {0x01A2, 0x00},
{0x01A3, 0x00}, {0x01A3, 0x00},
// //
......
...@@ -160,10 +160,10 @@ int external_align_fsm(volatile struct spll_external_state *s) ...@@ -160,10 +160,10 @@ int external_align_fsm(volatile struct spll_external_state *s)
if(align_sample(1, &v)) { if(align_sample(1, &v)) {
v %= ALIGN_SAMPLE_PERIOD; v %= ALIGN_SAMPLE_PERIOD;
if(v == 0 || v >= ALIGN_SAMPLE_PERIOD / 2) { if(v == 0 || v >= ALIGN_SAMPLE_PERIOD / 2) {
s->align_target = EXT_PERIOD_NS; s->align_target = 0;
s->align_step = -100; s->align_step = -100;
} else if (s > 0) { } else if (s > 0) {
s->align_target = 0; s->align_target = ALIGN_SAMPLE_PERIOD-EXT_PERIOD_NS;
s->align_step = 100; s->align_step = 100;
} }
......
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