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Software for White Rabbit PTP Core
Commit 6174a3db authored by José López Jiménez's avatar José López Jiménez
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SoftPLL: Ext pll lock now from regs instead of SPI read

parent bb2d891e
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Showing with 14 additions and 2 deletions
dev/ad9516.c
View file @ 6174a3db
......@@ -231,6 +231,8 @@ static void ad9516_sync_outputs(void *spi_base)
}
// This function is related to a not very well documented bug in the external softpll init code.
int ext_ad9516_locked (void)
{
if ((ad9516_read_reg((void *)BASE_SPI_EXT_BOARD, 0x1f) & 1))
......
softpll/hw/softpll_regs.h
View file @ 6174a3db
......@@ -3,7 +3,7 @@
* File : softpll_regs.h
* Author : auto-generated by wbgen2 from spll_wb_slave.wb
* Created : Thu Dec 3 15:09:41 2015
* Created : Mon Jun 3 10:25:43 2019
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE spll_wb_slave.wb
......@@ -14,7 +14,11 @@
#ifndef __WBGEN2_REGDEFS_SPLL_WB_SLAVE_WB
#define __WBGEN2_REGDEFS_SPLL_WB_SLAVE_WB
#ifdef __KERNEL__
#include <linux/types.h>
#else
#include <inttypes.h>
#endif
#if defined( __GNUC__)
#define PACKED __attribute__ ((packed))
......@@ -68,6 +72,9 @@
/* definitions for field: EXT_REF_STOPPED in reg: External Clock Control Register */
#define SPLL_ECCR_EXT_REF_STOPPED WBGEN2_GEN_MASK(3, 1)
/* definitions for field: EXT_REF_PLLLOCK in reg: External Clock Control Register */
#define SPLL_ECCR_EXT_REF_PLLLOCK WBGEN2_GEN_MASK(4, 1)
/* definitions for field: EXT_PLL_RST in reg: External Clock Control Register */
#define SPLL_ECCR_EXT_REF_PLLRST WBGEN2_GEN_MASK(31, 1)
......
softpll/spll_external.c
View file @ 6174a3db
......@@ -58,6 +58,9 @@ int external_locked(volatile struct spll_external_state *s)
if (!gpio_in(GPIO_EXT_BOARD_DETECT) && (!(SPLL->ECCR & SPLL_ECCR_EXT_REF_LOCKED) || // ext PLL became unlocked
(SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED))) // 10MHz unplugged (only SPEC)
return 0;
if (!(gpio_in(GPIO_EXT_BOARD_DETECT) && (SPLL->ECCR & SPLL_ECCR_EXT_REF_PLLLOCK)))
return 0;
//FIXME A bug prevents the correct locking if the external lock check is executed
// Correct way to solve it: export the LOCK signal from the gateware and check it
// if (gpio_in(GPIO_EXT_BOARD_DETECT) && ext_ad9516_locked())
......@@ -121,7 +124,7 @@ int external_align_fsm(volatile struct spll_external_state *s)
if(!gpio_in(GPIO_EXT_BOARD_DETECT) && SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED )
s->align_state = ALIGN_STATE_WAIT_CLKIN;
else if((!gpio_in(GPIO_EXT_BOARD_DETECT) && SPLL->ECCR & SPLL_ECCR_EXT_REF_LOCKED ) ||
gpio_in(GPIO_EXT_BOARD_DETECT) && ext_ad9516_locked())
gpio_in(GPIO_EXT_BOARD_DETECT) && SPLL->ECCR & SPLL_ECCR_EXT_REF_PLLLOCK)
s->align_state = ALIGN_STATE_START;
done_sth++;
break;
......
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