include/hw: added Si57x interface HW header

70f7bc51 · Tomasz Wlostowski · 34a83db3 · 70f7bc51
Commit 70f7bc51 authored Mar 18, 2020 by Tomasz Wlostowski
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si570_if_wb.h include/hw/si570_if_wb.h +90 -0

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--- a/include/hw/si570_if_wb.h
+++ b/include/hw/si570_if_wb.h
+/*
+  Register definitions for slave core: silabs interface
+
+  * File           : si570_if_wb.h
+  * Author         : auto-generated by wbgen2 from si570_if_wb.wb
+  * Created        : Thu Mar 12 23:41:40 2020
+  * Standard       : ANSI C
+
+    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE si570_if_wb.wb
+    DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
+
+*/
+
+#ifndef __WBGEN2_REGDEFS_SI570_IF_WB_WB
+#define __WBGEN2_REGDEFS_SI570_IF_WB_WB
+
+#ifdef __KERNEL__
+#include <linux/types.h>
+#else
+#include <inttypes.h>
+#endif
+
+#if defined( __GNUC__)
+#define PACKED __attribute__ ((packed))
+#else
+#error "Unsupported compiler?"
+#endif
+
+#ifndef __WBGEN2_MACROS_DEFINED__
+#define __WBGEN2_MACROS_DEFINED__
+#define WBGEN2_GEN_MASK(offset, size) (((1<<(size))-1) << (offset))
+#define WBGEN2_GEN_WRITE(value, offset, size) (((value) & ((1<<(size))-1)) << (offset))
+#define WBGEN2_GEN_READ(reg, offset, size) (((reg) >> (offset)) & ((1<<(size))-1))
+#define WBGEN2_SIGN_EXTEND(value, bits) (((value) & (1<<bits) ? ~((1<<(bits))-1): 0 ) | (value))
+#endif
+
+
+/* definitions for register: Control Register */
+
+/* definitions for field: Si57x Address in reg: Control Register */
+#define SI570_CR_I2C_ADDR_MASK                WBGEN2_GEN_MASK(0, 8)
+#define SI570_CR_I2C_ADDR_SHIFT               0
+#define SI570_CR_I2C_ADDR_W(value)            WBGEN2_GEN_WRITE(value, 0, 8)
+#define SI570_CR_I2C_ADDR_R(reg)              WBGEN2_GEN_READ(reg, 0, 8)
+
+/* definitions for field: Si57x SPLL input enable in reg: Control Register */
+#define SI570_CR_ENABLE                       WBGEN2_GEN_MASK(8, 1)
+
+/* definitions for field: RFREQ gain/scalefactor in reg: Control Register */
+#define SI570_CR_GAIN_MASK                    WBGEN2_GEN_MASK(9, 8)
+#define SI570_CR_GAIN_SHIFT                   9
+#define SI570_CR_GAIN_W(value)                WBGEN2_GEN_WRITE(value, 9, 8)
+#define SI570_CR_GAIN_R(reg)                  WBGEN2_GEN_READ(reg, 9, 8)
+
+/* definitions for field: I2C Clock Divider in reg: Control Register */
+#define SI570_CR_CLK_DIV_MASK                 WBGEN2_GEN_MASK(17, 8)
+#define SI570_CR_CLK_DIV_SHIFT                17
+#define SI570_CR_CLK_DIV_W(value)             WBGEN2_GEN_WRITE(value, 17, 8)
+#define SI570_CR_CLK_DIV_R(reg)               WBGEN2_GEN_READ(reg, 17, 8)
+
+/* definitions for register: RFREQ low part */
+
+/* definitions for register: RFREQ hi part */
+
+/* definitions for register: GPIO Set/Readback Register */
+
+/* definitions for field: SIlabs I2C bitbanged SCL in reg: GPIO Set/Readback Register */
+#define SI570_GPSR_SCL                        WBGEN2_GEN_MASK(0, 1)
+
+/* definitions for field: SIlabs I2C bitbanged SDA in reg: GPIO Set/Readback Register */
+#define SI570_GPSR_SDA                        WBGEN2_GEN_MASK(1, 1)
+
+/* definitions for register: GPIO Clear Register */
+
+/* definitions for field: SILabs I2C bitbanged SCL in reg: GPIO Clear Register */
+#define SI570_GPCR_SCL                        WBGEN2_GEN_MASK(0, 1)
+
+/* definitions for field: SIlabs I2C bitbanged SDA in reg: GPIO Clear Register */
+#define SI570_GPCR_SDA                        WBGEN2_GEN_MASK(1, 1)
+/* [0x0]: REG Control Register */
+#define SI570_REG_CR 0x00000000
+/* [0x4]: REG RFREQ low part */
+#define SI570_REG_RFREQL 0x00000004
+/* [0x8]: REG RFREQ hi part */
+#define SI570_REG_RFREQH 0x00000008
+/* [0xc]: REG GPIO Set/Readback Register */
+#define SI570_REG_GPSR 0x0000000c
+/* [0x10]: REG GPIO Clear Register */
+#define SI570_REG_GPCR 0x00000010
+#endif