Commit c93f930a authored by Peter Jansweijer's avatar Peter Jansweijer

variable DAC_BITS for main PLL

parent b6cb7038
Pipeline #3590 failed with stage
in 1 minute and 21 seconds
......@@ -30,7 +30,7 @@ void mpll_init(struct spll_main_state *s, int id_ref,
s->ps_freeze = 0;
s->vco_freeze = 0;
s->pi.y_min = 5;
s->pi.y_max = 65530;
s->pi.y_max = (1 << DAC_BITS) - 5;
s->pi.anti_windup = 1;
s->pi.bias = 30000;
s->pi.shift = PI_FRACBITS;
......
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