Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
S
Software for White Rabbit PTP Core
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
32
Issues
32
List
Board
Labels
Milestones
Merge Requests
7
Merge Requests
7
CI / CD
CI / CD
Pipelines
Schedules
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Software for White Rabbit PTP Core
Commits
d89f4194
Commit
d89f4194
authored
Sep 05, 2023
by
Tristan Gingold
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
risc-v/ram.ld.S: align data segment size
to avoid errors while converting bin to vhd
parent
6dff78a3
Pipeline
#4836
passed with stage
in 3 minutes and 45 seconds
Changes
1
Pipelines
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
1 addition
and
1 deletion
+1
-1
ram.ld.S
arch/risc-v/ram.ld.S
+1
-1
No files found.
arch/risc-v/ram.ld.S
View file @
d89f4194
...
...
@@ -64,11 +64,11 @@ SECTIONS
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
. = ALIGN(4);
} > ram
/* Bounds of data segment. Be sure the end is aligned. */
_fdata = ADDR(.data);
. = ALIGN(4);
_edata = .;
/*--------------------------------------------------------------------*/
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment