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Software for White Rabbit PTP Core
Commit ea23c90c authored by Grzegorz Daniluk's avatar Grzegorz Daniluk
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ljd: treat ljd similar to regular ext channel (as much as possible)

parent 1c9307d7
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Showing with 29 additions and 33 deletions
dev/ad9516.c
View file @ ea23c90c
...@@ -216,14 +216,6 @@ static void ad9516_sync_outputs(void *spi_base) ...@@ -216,14 +216,6 @@ static void ad9516_sync_outputs(void *spi_base)
} }
int ext_ad9516_locked (void)
{
if ((ad9516_read_reg((void *)BASE_SPI_EXT_BOARD, 0x1f) & 1))
return 1;
return 0;
}
int ad9516_init(int scb_version, int ljd_present) int ad9516_init(int scb_version, int ljd_present)
{ {
pp_printf("Initializing AD9516 PLL...\n"); pp_printf("Initializing AD9516 PLL...\n");
...@@ -303,13 +295,6 @@ int ext_ad9516_init (void) { ...@@ -303,13 +295,6 @@ int ext_ad9516_init (void) {
oc_spi_init((void *)BASE_SPI_EXT_BOARD); oc_spi_init((void *)BASE_SPI_EXT_BOARD);
void *spi_base = (void *)BASE_SPI_EXT_BOARD; void *spi_base = (void *)BASE_SPI_EXT_BOARD;
/* reset the PLL */
gpio_out(GPIO_EXT_PLL_RESET_N, 0);
timer_delay(10);
gpio_out(GPIO_EXT_PLL_RESET_N, 1);
timer_delay(10);
/* Use unidirectional SPI mode */ /* Use unidirectional SPI mode */
ad9516_write_reg((void *)spi_base, 0x000, 0x99); ad9516_write_reg((void *)spi_base, 0x000, 0x99);
......
include/wrc.h
View file @ ea23c90c
...@@ -72,7 +72,6 @@ extern int wrc_ui_refperiod; ...@@ -72,7 +72,6 @@ extern int wrc_ui_refperiod;
/* Init functions and defaults for the wrs build */ /* Init functions and defaults for the wrs build */
int ad9516_init(int scb_ver, int ljd_present); int ad9516_init(int scb_ver, int ljd_present);
int ext_ad9516_init(void); int ext_ad9516_init(void);
int ext_ad9516_locked(void);
void rts_init(void); void rts_init(void);
int rtipc_init(void); int rtipc_init(void);
void rts_update(void); void rts_update(void);
......
softpll/spll_external.c
View file @ ea23c90c
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include "softpll_ng.h" #include "softpll_ng.h"
#include "irq.h" #include "irq.h"
#include "gpio-wrs.h" #include "gpio-wrs.h"
#include "syscon.h"
#define ALIGN_SAMPLE_PERIOD 100000 #define ALIGN_SAMPLE_PERIOD 100000
#define ALIGN_TARGET 0 #define ALIGN_TARGET 0
...@@ -53,16 +54,10 @@ void external_start(struct spll_external_state *s) ...@@ -53,16 +54,10 @@ void external_start(struct spll_external_state *s)
int external_locked(volatile struct spll_external_state *s) int external_locked(volatile struct spll_external_state *s)
{ {
if (!s->helper->ld.locked || !s->main->ld.locked) if (!s->helper->ld.locked || !s->main->ld.locked ||
return 0; !(SPLL->ECCR & SPLL_ECCR_EXT_REF_LOCKED) || // ext PLL became unlocked
(SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED)) // 10MHz unplugged (only SPEC)
if (!ljd_present && (!(SPLL->ECCR & SPLL_ECCR_EXT_REF_LOCKED) || // ext PLL became unlocked
(SPLL->ECCR & SPLL_ECCR_EXT_REF_STOPPED))) // 10MHz unplugged (only SPEC)
return 0; return 0;
//FIXME A bug prevents the correct locking if the external lock check is executed
// Correct way to solve it: export the LOCK signal from the gateware and check it
// if (ljd_present && ext_ad9516_locked())
// return 1;
switch(s->align_state) { switch(s->align_state) {
case ALIGN_STATE_EXT_OFF: case ALIGN_STATE_EXT_OFF:
...@@ -105,6 +100,8 @@ int external_align_fsm(volatile struct spll_external_state *s) ...@@ -105,6 +100,8 @@ int external_align_fsm(volatile struct spll_external_state *s)
{ {
int v, done_sth = 0; int v, done_sth = 0;
uint32_t f_ext = 0; uint32_t f_ext = 0;
int ljd_ad9516_stat;
static int timeout;
switch(s->align_state) { switch(s->align_state) {
case ALIGN_STATE_EXT_OFF: case ALIGN_STATE_EXT_OFF:
...@@ -115,15 +112,21 @@ int external_align_fsm(volatile struct spll_external_state *s) ...@@ -115,15 +112,21 @@ int external_align_fsm(volatile struct spll_external_state *s)
SPLL->ECCR |= SPLL_ECCR_EXT_REF_PLLRST; SPLL->ECCR |= SPLL_ECCR_EXT_REF_PLLRST;
s->align_state = ALIGN_STATE_WAIT_PLOCK; s->align_state = ALIGN_STATE_WAIT_PLOCK;
done_sth++; done_sth++;
} else if (ljd_present) {
/* reset ljd ad9516 */
SPLL->ECCR |= SPLL_ECCR_EXT_REF_PLLRST;
timer_delay(10);
SPLL->ECCR &= (~SPLL_ECCR_EXT_REF_PLLRST);
timer_delay(10);
ljd_ad9516_stat = ext_ad9516_init();
f_ext = spll_measure_frequency(SPLL_OSC_EXT);
if (!ljd_ad9516_stat && (f_ext > 9999000) && (f_ext < 10001000)) {
s->align_state = ALIGN_STATE_WAIT_PLOCK;
pp_printf("External AD9516 locked\n");
}
} }
f_ext = spll_measure_frequency(SPLL_OSC_EXT);
if (ljd_present && (f_ext > 9999000) && (f_ext < 10001000)) break;
if (!ext_ad9516_init()) {
s->align_state = ALIGN_STATE_WAIT_PLOCK;
pp_printf("External AD9516 locked\n");
}
break;
case ALIGN_STATE_WAIT_PLOCK: case ALIGN_STATE_WAIT_PLOCK:
SPLL->ECCR &= (~SPLL_ECCR_EXT_REF_PLLRST); SPLL->ECCR &= (~SPLL_ECCR_EXT_REF_PLLRST);
...@@ -141,6 +144,9 @@ int external_align_fsm(volatile struct spll_external_state *s) ...@@ -141,6 +144,9 @@ int external_align_fsm(volatile struct spll_external_state *s)
enable_irq(); enable_irq();
s->align_state = ALIGN_STATE_START_MAIN; s->align_state = ALIGN_STATE_START_MAIN;
done_sth++; done_sth++;
} else if (time_after(timer_get_tics(), timeout + 5*TICS_PER_SECOND)) {
pll_verbose("EXT: timeout, restarting\n");
s->align_state = ALIGN_STATE_WAIT_CLKIN;
} }
break; break;
...@@ -153,6 +159,9 @@ int external_align_fsm(volatile struct spll_external_state *s) ...@@ -153,6 +159,9 @@ int external_align_fsm(volatile struct spll_external_state *s)
s->align_state = ALIGN_STATE_INIT_CSYNC; s->align_state = ALIGN_STATE_INIT_CSYNC;
pll_verbose("EXT: DMTD locked.\n"); pll_verbose("EXT: DMTD locked.\n");
done_sth++; done_sth++;
} else if (time_after(timer_get_tics(), timeout + 5*TICS_PER_SECOND)) {
pll_verbose("EXT: timeout, restarting\n");
s->align_state = ALIGN_STATE_WAIT_CLKIN;
} }
break; break;
...@@ -223,5 +232,8 @@ int external_align_fsm(volatile struct spll_external_state *s) ...@@ -223,5 +232,8 @@ int external_align_fsm(volatile struct spll_external_state *s)
default: default:
break; break;
} }
if (done_sth > 0) {
timeout = timer_get_tics();
}
return done_sth != 0; return done_sth != 0;
} }
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