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White Rabbit Trigger Distribution
Commits
3f5f59be
Commit
3f5f59be
authored
Jul 23, 2018
by
Dimitris Lampridis
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hdl/sim: update wrtd-system testbench to make use of rmq-udp test firmware
parent
84dd8b5b
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2 changed files
with
36 additions
and
29 deletions
+36
-29
main.sv
hdl/testbench/wrtd-system/main.sv
+5
-5
rmq-udp.c
tests/firmware/rmq-udp/rmq-udp.c
+31
-24
No files found.
hdl/testbench/wrtd-system/main.sv
View file @
3f5f59be
...
@@ -104,7 +104,7 @@ module main;
...
@@ -104,7 +104,7 @@ module main;
IMockTurtleIRQ
IrqMonitorB
(
`MT_ATTACH_IRQ
(
DUT_B
.
cmp_mock_turtle
))
;
IMockTurtleIRQ
IrqMonitorB
(
`MT_ATTACH_IRQ
(
DUT_B
.
cmp_mock_turtle
))
;
string
fw
=
"../../
ip_cores/mock-turtle/demos/hello_world/firmware/fw-01/fw-hello
.bin"
;
string
fw
=
"../../
../tests/firmware/rmq-udp/fw-rmq-udp
.bin"
;
const
uint64_t
mt_base
=
'h2_0000
;
const
uint64_t
mt_base
=
'h2_0000
;
...
@@ -116,19 +116,19 @@ module main;
...
@@ -116,19 +116,19 @@ module main;
@
(
posedge
DUT_A
.
clk_sys_62m5
)
;
@
(
posedge
DUT_A
.
clk_sys_62m5
)
;
drvA
=
new
(
HostA
.
get_accessor
()
,
mt_base
,
IrqMonitorA
,
"DUTA"
)
;
drvA
=
new
(
HostA
.
get_accessor
()
,
mt_base
,
IrqMonitorA
,
"DUTA"
)
;
drvB
=
new
(
HostB
.
get_accessor
()
,
mt_base
,
IrqMonitorB
)
;
drvB
=
new
(
HostB
.
get_accessor
()
,
mt_base
,
IrqMonitorB
,
"DUTB"
)
;
drvA
.
init
()
;
drvA
.
init
()
;
drvB
.
init
()
;
drvB
.
init
()
;
drvA
.
enable_console_irq
(
0
,
1
)
;
drvA
.
enable_console_irq
(
0
,
1
)
;
drvB
.
enable_console_irq
(
0
,
1
)
;
drvB
.
enable_console_irq
(
1
,
1
)
;
drvA
.
load_firmware
(
0
,
fw
,
1'b0
)
;
drvA
.
load_firmware
(
0
,
fw
,
1'b0
)
;
drvB
.
load_firmware
(
0
,
fw
,
1'b0
)
;
drvB
.
load_firmware
(
1
,
fw
,
1'b0
)
;
drvA
.
reset_core
(
0
,
0
)
;
drvA
.
reset_core
(
0
,
0
)
;
drvB
.
reset_core
(
0
,
0
)
;
drvB
.
reset_core
(
1
,
0
)
;
forever
begin
forever
begin
drvA
.
update
()
;
drvA
.
update
()
;
...
...
tests/firmware/rmq-udp/rmq-udp.c
View file @
3f5f59be
#include <mockturtle-rt.h>
#include <mockturtle-rt.h>
#define MT_WR_LINK_READY (MT_CPU_LR_WR_STAT_LINK_OK | MT_CPU_LR_WR_STAT_TIME_OK)
void
send_pkt
(
int
rmq
)
void
send_pkt
(
int
rmq
)
{
{
struct
trtl_fw_msg
msg
;
struct
trtl_fw_msg
msg
;
// queue full? wait
// queue full? wait
while
(
!
mq_claim
(
TRTL_RMQ
,
rmq
))
while
(
!
mq_claim
(
TRTL_RMQ
,
rmq
))
;
;
mq_map_out_message
(
TRTL_RMQ
,
rmq
,
&
msg
);
mq_map_out_message
(
TRTL_RMQ
,
rmq
,
&
msg
);
msg
.
header
->
len
=
1
;
msg
.
header
->
len
=
1
;
*
(
int
*
)
msg
.
payload
=
0x12345678
;
*
(
int
*
)
msg
.
payload
=
0x12345678
;
pp_printf
(
"TX data
\n
"
);
pp_printf
(
"TX data
\n
"
);
mq_send
(
TRTL_RMQ
,
rmq
);
mq_send
(
TRTL_RMQ
,
rmq
);
}
}
...
@@ -23,11 +25,11 @@ void handle_rx(int rmq)
...
@@ -23,11 +25,11 @@ void handle_rx(int rmq)
struct
trtl_fw_msg
tmsg
;
struct
trtl_fw_msg
tmsg
;
while
(
!
mq_poll_in
(
TRTL_RMQ
,
1
<<
rmq
))
while
(
!
mq_poll_in
(
TRTL_RMQ
,
1
<<
rmq
))
;
;
mq_map_in_message
(
TRTL_RMQ
,
rmq
,
&
tmsg
);
mq_map_in_message
(
TRTL_RMQ
,
rmq
,
&
tmsg
);
pp_printf
(
"RX data: 0x%08x
\n
"
,
*
(
int
*
)
tmsg
.
payload
);
pp_printf
(
"RX data: 0x%08x
\n
"
,
*
(
int
*
)
tmsg
.
payload
);
mq_discard
(
TRTL_RMQ
,
rmq
);
mq_discard
(
TRTL_RMQ
,
rmq
);
}
}
...
@@ -39,7 +41,12 @@ int main(void)
...
@@ -39,7 +41,12 @@ int main(void)
struct
trtl_ep_address
bind_addr
;
struct
trtl_ep_address
bind_addr
;
pp_printf
(
"TEST for: RMQ UDP %s
\n
"
,
cpu
==
0
?
"recv"
:
"send"
);
pp_printf
(
"TEST for: RMQ UDP %s
\n
"
,
cpu
==
0
?
"recv"
:
"send"
);
while
((
lr_readl
(
MT_CPU_LR_REG_WR_STAT
)
&
MT_WR_LINK_READY
)
!=
MT_WR_LINK_READY
)
;
pp_printf
(
"WR link up and time valid
\n
"
);
// set up the RMQ Endpoint
// set up the RMQ Endpoint
...
@@ -66,23 +73,23 @@ int main(void)
...
@@ -66,23 +73,23 @@ int main(void)
// RX filter: we want only UDP packets with matching desination port & IP address.
// RX filter: we want only UDP packets with matching desination port & IP address.
bind_addr
.
filter
=
TRTL_EP_FILTER_UDP
|
TRTL_EP_FILTER_DST_PORT
|
TRTL_EP_FILTER_DST_IP
;
bind_addr
.
filter
=
TRTL_EP_FILTER_UDP
|
TRTL_EP_FILTER_DST_PORT
|
TRTL_EP_FILTER_DST_IP
;
if
(
cpu
==
0
)
if
(
cpu
==
0
)
{
{
// configure incoming channel
// configure incoming channel
mq_bind
(
TRTL_RMQ
,
rmq
,
0
,
&
bind_addr
);
mq_bind
(
TRTL_RMQ
,
rmq
,
0
,
&
bind_addr
);
}
}
else
else
{
{
// configure outgoing channel
// configure outgoing channel
mq_bind
(
TRTL_RMQ
,
rmq
,
1
,
&
bind_addr
);
mq_bind
(
TRTL_RMQ
,
rmq
,
1
,
&
bind_addr
);
}
}
if
(
cpu
==
0
)
if
(
cpu
==
0
)
handle_rx
(
rmq
);
handle_rx
(
rmq
);
else
else
send_pkt
(
rmq
);
send_pkt
(
rmq
);
while
(
1
)
while
(
1
)
;
;
return
0
;
return
0
;
}
}
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