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However, the FPGA gateware will still be responsible for implementing
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ceilings on frequency repetition and fixed pulse width values.
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For this ceilings to be chosen a direct experimental approach will be
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taken, informed by:
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- MOSFET datasheet parameters.
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- Methods and calculations described in an [application
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note](http://www.nxp.com/documents/application_note/AN10273.pdf?fasp=1&WT_TYPE=Application%20Notes&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation&fileExt=.pdf)
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from the manufacturer.
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- Measurements of the new V3 board prototypes (note 1) performance.
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## Aim of stress tests
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Two modes of operation are foreseen for the new version of the
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than the maximum defined in the continuous mode, provided it is for
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a limited amount of time. This mode of operation is also known as
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burst mode.
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\> Identify the maximum repetition frequency that can be achieved
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and how long before this frequency can cause irreversible damage to
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the board.
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\> Aim of tests: Identify the maximum repetition frequency that can
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be achieved and how long before this frequency can cause
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irreversible damage to the board.
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The outcome of these tests can take a number of forms:
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- The amount of time the board can sustain maximum rate of repetition,
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without being damaged.
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- The number of pulses that can be repeated at a given rate without
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causing damage to the board.
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- A target average frequency over a time period.
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- A relationship between repetition frequencies and the time for which
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the board can sustain it safely.
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## Minimal pulse definition in the fast repetition mode:
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## Minimal pulse definition:
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- **Pulse width**: It shall be specified as 1.2us in the continuous
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mode and 250ns for the fast mode. The short 250ns pulse is long
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cycle will be assumed. This corresponds to maximum 500kHz pulses.
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\> This Duty cycle might be increased during further tests to 50%
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corresponding to 2MHz frequency to see how much it impacts on
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transistor
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life.
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transistor life.
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## Test procedure and requirements
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## Test procedure and requirements
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The diagram below summarises the test procedure.
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The diagram below summarises the test
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procedure.
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![](/uploads/a78ad30578422d50c4e9b0b6cee7dea4/hw-max-freq-test-procedure.png)
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Diagram describing the test system components and the flow of control
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and output data.
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Figure 1: Diagram describing the test system components and the flow of
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control and output data.
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### Hardware
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... | ... | @@ -87,13 +77,12 @@ and output data. |
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### Gateware & Software
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- The on-board FPGA will be programmed with the \*
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- The on-board FPGA will be programmed with the
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[Pulsetest](https://www.ohwr.org/project/conv-ttl-blo-gw/wikis/Pulsetest)
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bitsream, a special gateware release for long-term testing. It
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provides the user with the possibility of setting pulse repetition
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parameters, by writing into a set of registers. Performance of the
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board can also be read from another set of registers. Some of the
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functionality is to:
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parameters, by writing into a set of registers, via I2C. The
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gateware offers the following functionality:
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- Set pulse width, repetition frequency and delay.
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- Read Input counters.
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- Read Output counters.
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<!-- end list -->
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- Software script to write into board registers and set the output for
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a particular channel to the desired parameters. The program will
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also read relevant channel counters and output these as log files at
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the end of tests.
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a particular channel to the desired parameters.
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- Log files will be saved with test parameters and final counter
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values.
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### Procedure:
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... | ... | @@ -134,9 +123,9 @@ and output data. |
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400kHz, 500kHz.
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- The test must be stopped when the blocking output fails. This is
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detected when:
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- When the blocking output pulse disappears from the
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Oscilloscope screen (Or when the damage to blocking output
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is seen... or smelt). The test must be stopped.
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- The blocking output pulse disappears from the Oscilloscope
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screen (Or when the damage to blocking output is seen... or
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smelt). The test must be stopped.
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- The Python scripts should be able to detect this by
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comparing the read out from the MC channel counter, with
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that of the CUT. If the MC count is smaller than the CUT
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