hdl: Fix bug in wishbone interface.

Command strobe should asserted even if it is already 1.

hdl: Fix bug in wishbone interface.
Command strobe should asserted even if it is already 1.
7f76b945 · Matthieu Cattin · 26d0d907 · 7f76b945
Commit 7f76b945 authored Mar 28, 2013 by Matthieu Cattin
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ddr3_ctrl_wb.vhd hdl/rtl/ddr3_ctrl_wb.vhd +1 -1

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--- a/hdl/rtl/ddr3_ctrl_wb.vhd
+++ b/hdl/rtl/ddr3_ctrl_wb.vhd
@@ -262,7 +262,7 @@ begin
        ddr_cmd_en_d <= ddr_cmd_en;
        if (((ddr_burst_cnt = c_DDR_BURST_LENGTH) or
             (wb_cyc_f_edge = '1' and wb_we_d = '1') or
-             (wb_stb_f_edge = '1' and wb_we_d = '0')) and ddr_cmd_full_i = '0') and (ddr_cmd_en = '0') then
+             (wb_stb_f_edge = '1' and wb_we_d = '0')) and ddr_cmd_full_i = '0') then
          ddr_cmd_en <= '1';            -- might have problem if burst_cnt = BURST_LENGTH for more than 2 clk cycles
        else
          ddr_cmd_en <= '0';