E-bone
SoC interconnection and cores
Project description
E-bone first aims at interfacing an FPGA based PCIe Endpoint core to a
collection of other cores.
The E-bone release contains a number of general purpose cores within
that scope.
E-bone specifications cater for both a Control Interconnect and a Fast
Transmitter.
The Control Interconnect defines a 32 bit wide interconnection between a
number of masters and slaves.
The Fast Transmitter is a one way path (up to 256 bit wide) aiming at
dumping large data sets to the root complex.
E-bone is nevertheless not restricted to PCIe interfacing and may be used for developing sub-systems in others environments.
The E-bone interconnection is straightforward to implement.
Installation
E-bone is distributed as a compressed tar file in the Files section.
From a shell run the following commands in the directory where you want
to upload the E-bone tree.
$ gunzip eboneYYMMDD.tar.gz
$ tar xf eboneYYMMDD.tar
$ rm eboneYYMMDD.tar
Set the environment variable:
$ export EBONE_ROOT=path_to_ebone
A few utilities are located in the /bin directory.
$ export PATH=$PATH:EBONE_ROOT/bin
Every core distribution is organized with the following directories
- /doc : Documentation (single file in pdf or txt format)
- /src : Sources
- /syn : Synthesis (optional, constraint file, ...)
In some specific cases there might be more directories. See the documentation for each core.
What else?
Credits
- Home institute: www.esrf.eu
- Hardware developers: Christian Hervé, Thierry Le Caër
- Software support: Fabien Le Mentec
- Our Users
- External IPs re-used
- I2C: Richard Herveille via opencores.org
- SPI: Simon Srot via opencores.org
- SecretBlaze: ADAC Research Group - LIRMM - University of Montpellier (adac@lirmm.fr)
Status
See the Release Notes