pcie-fmc-soc-vdas
Project description
pcie-fmc-soc-vdas is a PCIe carrier for a high pin count FPGA Mezzanine
Card (VITA 57).
The main component is a SOC chip used in cellular base stations that can
do advanced processing.
- Template text ****
The FMC PCIe Carrier is an FMC carrier that can hold one FMC card and an SFP connector. On the PCIe side it has a 4-lane interface, while the FMC mezzanine slot uses a high-pin count connector. This board is optimised for cost and is usable with most of the FMC cards designed within the OHR project (e.g. ADC cards, Fine Delay).
Boards with a very similar architecture are available for the VME bus
(SVEC - Simple VME FMC Carrier
(SVEC)) and for the PXI
Express bus (SPEXI - Simple PXI express FMC Carrier Board
(SPEXI)).
Other FMC projects and the FMC standard are described in FMC
Projects.
Main Features
- 4-lane PCIe (Gennum GN4124)
- 1x Xilinx Spartan6 FPGA (XC6SLX45T-3FGG484C)
- FMC slot with high pin count (HPC) connector
- Vadj fixed to 2.5V
- FMC connectivity: all 34 differential pairs connected, 1 GTP transceiver with clock, 2 clock pairs, JTAG
- No dedicated clock signals from Carrier to FMC (only available on HPC pins)
- Clocking resources
- 1x 10-280 MHz I2C Programmable XO Oscillator, starts up at 100 MHz (Silicon Labs Si570, freely usable)
- 1x 25 MHz TCXO controlled by a DAC with SPI interface (AD5662, used by White Rabbit PTP core)
- 1x 20 MHz VCXO controlled by a DAC with SPI interface (AD5662, used by White Rabbit PTP core)
- 1x low-jitter frequency synthesizer (TI CDCM61004, fixed configuration, Fout=125 MHz, used by White Rabbit PTP core)
- On board memory
- 1x 2Gbit (256 MByte) DDR3 (MT41J128M16HA-15E)
- 1x SPI 32Mbit flash PROM for multiboot FPGA powerup configuration, storage of the FPGA firmware or of critical data
- Miscellaneous
- on-board thermometer IC (DS18B20U+)
- unique 64-bit identifier (DS18B20U+)
- Front panel containing
- 1x Small Formfactor Pluggable (SFP) cage for fibre-optic transceiver (WhiteRabbit support). 1.25 and 2.5 Gbps.
- Programmable Red and Green LEDs
- FMC front panel
- Internal connectors
- 1x JTAG header for Xilinx programming during debugging
- 2x SATA connector
- 1x mini USB AB (USB-UART bridge)
- FPGA configuration. The FPGA can optionally be programmed from:
- GN4124 SPRIO interface (loaded by software driver at startup)
- JTAG header
- SPI 32Mbit flash PROM
- selectable by GN4124 GPIO. Default option would be loading via the SPI flash PROM (stand-alone applications).
- Stand-alone features
- External 12V power supply connector
- mini USB connector
- 4 LEDs
- 2 buttons
- Power consumption: 5-12 Watt, depending on application
- Optimised for cost
- 6-layer PCB
Project information
- Official production documentation: EDMS EDA-02189
- System architecture
- Users
- Software
- Frequently Asked Questions
Releases
- Hardware: SPEC V4
Contacts
Commercial producers
- SPEC Creotech, Poland
- SPEC INCAA Computers, Netherlands
- SPEC Seven Solutions, Spain
- Related products:
- SPEC BOX - 1 or 3 Standalone Nodes Box Seven Solutions, Spain
- SPEC100 - with larger XC6SLX100T FPGA Seven Solutions, Spain
General questions about project
Status
Date | Event |
---|---|
2013 | First discussions with Freescale on general application of cell base station SOCs |
28-Sep-2014 | First discussion with CERN for SPEC board with SOC |
10-Nov-2014 | Project approval from CERN OHWR, start of project |
Marcus Barrow - 7 November 2014