VHDL : corrected a bug on clock padding LED function

On branch development modified: fpga/TimEX3/TimEX3_eeprom.mcs modified: fpga/sources/src_clkpadding/clkpadding_top.vhdl

VHDL : corrected a bug on clock padding LED function
On branch development modified: fpga/TimEX3/TimEX3_eeprom.mcs modified: fpga/sources/src_clkpadding/clkpadding_top.vhdl
e771a6d8 · Jean-Paul Ricaud · b0272366 · e771a6d8 · e771a6d8
Commit e771a6d8 authored Oct 04, 2018 by Jean-Paul Ricaud
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TimEX3_eeprom.mcs fpga/TimEX3/TimEX3_eeprom.mcs +9781 -9781

clkpadding_top.vhdl fpga/sources/src_clkpadding/clkpadding_top.vhdl +2 -2

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--- a/fpga/TimEX3/TimEX3_eeprom.mcs
+++ b/fpga/TimEX3/TimEX3_eeprom.mcs
--- a/fpga/sources/src_clkpadding/clkpadding_top.vhdl
+++ b/fpga/sources/src_clkpadding/clkpadding_top.vhdl
@@ -21,7 +21,7 @@
 -- File     : clkpadding_top.vhdl
 -- Revision : x.x.x
 -- Created  : July 19, 2014
-- Updated  : October 02, 2018
+-- Updated  : October 04, 2018
 --------------------------------------------------------------------------------
 -- Author       : Jean-Paul Ricaud
 -- Organization : Synchrotron Soleil
@@ -130,7 +130,7 @@ architecture rtl_clkPADDING_top of clkPADDING_top is

  p_clkPADDING_outPECL(4 downto 0) <= "00000";

-  p_clkPADDING_led(0) <= s_clkPADDING_LED_1khHz or s_clkPADDING_LED_5khHz; -- red LED
+  p_clkPADDING_led(0) <= s_clkPADDING_LED_1khHz and s_clkPADDING_LED_5khHz; -- red LED
  p_clkPADDING_led(1) <= '1'; -- green LED ON

 end architecture rtl_clkPADDING_top;