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AsyncArt
Commit a0a5a835 authored by Javier D. Garcia-Lasheras's avatar Javier D. Garcia-Lasheras
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Solve naming conflict with demos

parent 2db014fa
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hdl/asyncart_demo_1d.vhd
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...@@ -3,7 +3,7 @@ use ieee.std_logic_1164.all; ...@@ -3,7 +3,7 @@ use ieee.std_logic_1164.all;
use ieee.numeric_std.all; use ieee.numeric_std.all;
use ieee.std_logic_unsigned.all; use ieee.std_logic_unsigned.all;
entity asyncart_demo is entity asyncart_demo_1d is
port ( port (
--GCLK : in std_logic; -- 100 MHz input clock --GCLK : in std_logic; -- 100 MHz input clock
BTNC : in std_logic; -- 100 MHz input clock BTNC : in std_logic; -- 100 MHz input clock
...@@ -20,7 +20,7 @@ entity asyncart_demo is ...@@ -20,7 +20,7 @@ entity asyncart_demo is
); );
end entity; end entity;
architecture demo_hw of asyncart_demo is architecture demo_hw of asyncart_demo_1d is
component asyncart_source component asyncart_source
......
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