hdl/top/ml_605/*: update FMC ADC instantiaton in top files

The interface for the FMC ADC module have changed, so we update them here in the top files

hdl/top/ml_605/*: update FMC ADC instantiaton in top files
The interface for the FMC ADC module have changed, so we update them here in the top files
27ca18de · Lucas Russo · 7efbf4c3 · 27ca18de · 27ca18de · 27ca18de
Commit 27ca18de authored May 06, 2014 by Lucas Russo
3 changed files
--- a/hdl/top/ml_605/dbe_bpm_dsp_fmc130m_4ch/dbe_bpm_dsp.vhd
+++ b/hdl/top/ml_605/dbe_bpm_dsp_fmc130m_4ch/dbe_bpm_dsp.vhd
@@ -1519,6 +1519,13 @@ begin
    fmc_led2_o                              => fmc_led2_int,
    fmc_led3_o                              => fmc_led3_int,

+    -----------------------------
+    -- Optional external reference clock ports
+    -----------------------------
+    fmc_ext_ref_clk_i                       => '0', -- Unused
+    fmc_ext_ref_clk2x_i                     => '0', -- Unused
+    fmc_ext_ref_mmcm_locked_i               => '0', -- Unused
+
    -----------------------------
    -- ADC output signals. Continuous flow
    -----------------------------

--- a/hdl/top/ml_605/dbe_bpm_fmc130m_4ch/dbe_bpm_fmc130m_4ch.vhd
+++ b/hdl/top/ml_605/dbe_bpm_fmc130m_4ch/dbe_bpm_fmc130m_4ch.vhd
@@ -921,6 +921,13 @@ begin
    fmc_led2_o                              => fmc_led2_int,
    fmc_led3_o                              => fmc_led3_int,

+    -----------------------------
+    -- Optional external reference clock ports
+    -----------------------------
+    fmc_ext_ref_clk_i                       => '0', -- Unused
+    fmc_ext_ref_clk2x_i                     => '0', -- Unused
+    fmc_ext_ref_mmcm_locked_i               => '0', -- Unused
+
    -----------------------------
    -- ADC output signals. Continuous flow
    -----------------------------

--- a/hdl/top/ml_605/dbe_bpm_fmc130m_4ch_pcie/dbe_bpm_fmc130m_4ch_pcie.vhd
+++ b/hdl/top/ml_605/dbe_bpm_fmc130m_4ch_pcie/dbe_bpm_fmc130m_4ch_pcie.vhd
@@ -42,6 +42,7 @@ use work.fmc_adc_pkg.all;
 use work.acq_core_pkg.all;
 -- PCIe Core
 use work.bpm_pcie_ml605_pkg.all;
+use work.bpm_pcie_ml605_priv_pkg.all;

 library UNISIM;
 use UNISIM.vcomponents.all;
@@ -1285,6 +1286,13 @@ begin
    fmc_led2_o                              => fmc_led2_int,
    fmc_led3_o                              => fmc_led3_int,

+    -----------------------------
+    -- Optional external reference clock ports
+    -----------------------------
+    fmc_ext_ref_clk_i                       => '0', -- Unused
+    fmc_ext_ref_clk2x_i                     => '0', -- Unused
+    fmc_ext_ref_mmcm_locked_i               => '0', -- Unused
+
    -----------------------------
    -- ADC output signals. Continuous flow
    -----------------------------