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Beam Positoning Monitor - Gateware
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Beam Positoning Monitor - Gateware
Commits
4c4bd232
Commit
4c4bd232
authored
Sep 23, 2016
by
Lucas Russo
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modules/pcie/*: add missing Manifests to avoid hdlmake warnings
parent
7cfb84e1
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3 changed files
with
21 additions
and
2 deletions
+21
-2
Manifest.py
hdl/modules/pcie/Manifest.py
+2
-2
Manifest.py
hdl/modules/pcie/common/Manifest.py
+18
-0
Manifest.py
hdl/modules/pcie/pkgs/Manifest.py
+1
-0
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hdl/modules/pcie/Manifest.py
View file @
4c4bd232
files
=
[
"bpm_pcie.vhd"
,
]
modules
=
{
"git"
:
[
"https://github.com/lnls-dig/general-cores.git"
]}
modules
=
{
"local"
:
[
"common"
,
"pkgs"
],
"git"
:
[
"https://github.com/lnls-dig/general-cores.git"
]}
# original version hosted at OHWR:
# "git" : ["git://ohwr.org/hdl-core-lib/general-cores.git"]}
fetchto
=
"../../ip_cores"
files
=
[
"common/"
,
"pkgs/"
]
hdl/modules/pcie/common/Manifest.py
0 → 100644
View file @
4c4bd232
files
=
[
"ddr_Transact.vhd"
,
"Interrupts.vhd"
,
"rx_CplD_Channel.vhd"
,
"rx_MRd_Channel.vhd"
,
"rx_usDMA_Channel.vhd"
,
"Tx_Output_Arbitor.vhd"
,
"wb_transact.vhd"
,
"DMA_Calculate.vhd"
,
"rx_dsDMA_Channel.vhd"
,
"rx_MWr_Channel.vhd"
,
"tlpControl.vhd"
,
"tx_Transact.vhd"
,
"DMA_FSM.vhd"
,
"Registers.vhd"
,
"RxIn_Delays.vhd"
,
"rx_Transact.vhd"
,
"tx_Mem_Reader.vhd"
,
"wb_mem.vhd"
]
hdl/modules/pcie/pkgs/Manifest.py
0 → 100644
View file @
4c4bd232
files
=
[
"v6abb64Package_efifo_elink.vhd"
]
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