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Beam Positoning Monitor - Gateware
Commits
5295d518
Commit
5295d518
authored
Oct 15, 2015
by
Adrian Byszuk
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Switch PCIe testbench to gen2 and add one more contention test
parent
5223f924
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3 changed files
with
31 additions
and
7 deletions
+31
-7
pci_exp_usrapp_tx.v
hdl/sim/pcie/pci_exp_usrapp_tx.v
+3
-3
board.v
hdl/testbench/pcie/board.v
+4
-4
tf64_pcie_axi.vh
hdl/testbench/pcie/tf64_pcie_axi.vh
+24
-0
No files found.
hdl/sim/pcie/pci_exp_usrapp_tx.v
View file @
5295d518
...
...
@@ -260,7 +260,7 @@ initial begin
BAR_INIT_P_IO_START
=
33'h00000_0000
;
// start of 32bit io
DEV_VEN_ID
=
(
32'h70
14
<<
16
)
|
(
32'h10EE
)
;
DEV_VEN_ID
=
(
32'h70
21
<<
16
)
|
(
32'h10EE
)
;
PIO_MAX_MEMORY
=
8192
;
// PIO has max of 8Kbytes of memory
PIO_MAX_NUM_BLOCK_RAMS
=
4
;
// PIO has four block RAMS to test
...
...
@@ -386,7 +386,7 @@ end
$
display
(
"[%t] : Check Max Link Speed = 5.0GT/s - PASSED"
,
$
realtime
)
;
end
else
begin
$
display
(
"[%t] : Check Max Link Speed - FAILED"
,
$
realtime
)
;
$
display
(
"[%t] : Data Error Mismatch, Parameter Data %x != Read Data %x"
,
$
realtime
,
"
1
"
,
P_READ_DATA
[
19
:
16
])
;
$
display
(
"[%t] : Data Error Mismatch, Parameter Data %x != Read Data %x"
,
$
realtime
,
"
2
"
,
P_READ_DATA
[
19
:
16
])
;
end
...
...
@@ -402,7 +402,7 @@ end
if
(
P_READ_DATA
[
31
:
16
]
!=
16'h7021
)
begin
$
display
(
"[%t] : Check Device/Vendor ID - FAILED"
,
$
realtime
)
;
$
display
(
"[%t] : Data Error Mismatch, Parameter Data %x != Read Data %x"
,
$
realtime
,
16'h70
14
,
P_READ_DATA
)
;
$
display
(
"[%t] : Data Error Mismatch, Parameter Data %x != Read Data %x"
,
$
realtime
,
16'h70
21
,
P_READ_DATA
)
;
error_check
=
1
;
end
else
begin
$
display
(
"[%t] : Check Device/Vendor ID - PASSED"
,
$
realtime
)
;
...
...
hdl/testbench/pcie/board.v
View file @
5295d518
...
...
@@ -609,10 +609,10 @@ xilinx_pcie_2_1_rport_7x # (
.
PL_FAST_TRAIN
(
"TRUE"
)
,
.
ALLOW_X8_GEN2
(
"FALSE"
)
,
.
C_DATA_WIDTH
(
64
)
,
.
LINK_CAP_MAX_LINK_WIDTH
(
6'h
0
4
)
,
.
LINK_CAP_MAX_LINK_WIDTH
(
6'h4
)
,
.
DEVICE_ID
(
16'h7100
)
,
.
LINK_CAP_MAX_LINK_SPEED
(
4'h
1
)
,
.
LINK_CTRL2_TARGET_LINK_SPEED
(
4'h
1
)
,
.
LINK_CAP_MAX_LINK_SPEED
(
4'h
2
)
,
.
LINK_CTRL2_TARGET_LINK_SPEED
(
4'h
2
)
,
.
DEV_CAP_MAX_PAYLOAD_SUPPORTED
(
2
)
,
.
TRN_DW
(
"FALSE"
)
,
.
VC0_TX_LASTPACKET
(
29
)
,
...
...
@@ -620,7 +620,7 @@ xilinx_pcie_2_1_rport_7x # (
.
VC0_CPL_INFINITE
(
"TRUE"
)
,
.
VC0_TOTAL_CREDITS_PD
(
437
)
,
.
VC0_TOTAL_CREDITS_CD
(
461
)
,
.
USER_CLK_FREQ
(
2
)
,
.
USER_CLK_FREQ
(
3
)
,
.
USER_CLK2_DIV2
(
"FALSE"
)
)
RP
(
...
...
hdl/testbench/pcie/tf64_pcie_axi.vh
View file @
5295d518
...
...
@@ -565,6 +565,14 @@ begin
Copy_rnd_data;
TLP_Feed_Rx(`C_NO_BAR_HIT);
board.CplD_Index = board.CplD_Index + board.Rx_TLP_Length;
$display("%d ns: Polling the DMA status", $time);
board.Hdr_Array[0] = `HEADER0_MRD4_ | 'H01;
board.Hdr_Array[1] = {`C_HOST_RDREQ_ID, 3'H3, board.Rx_MRd_Tag, 4'Hf, 4'Hf};
board.Hdr_Array[2] = 'h0;
board.Hdr_Array[3] = `C_ADDR_DMA_DS_STA;
TLP_Feed_Rx(`C_BAR0_HIT);
board.Rx_MRd_Tag = board.Rx_MRd_Tag + 1;
board.Hdr_Array[0] = `HEADER0_CPLD | board.Rx_TLP_Length[9:0];
board.Hdr_Array[1] = {`C_HOST_CPLD_ID, 4'H0, board.Tx_MRd_Leng[9:0], 2'b00};
...
...
@@ -577,6 +585,14 @@ begin
board.CplD_Index = board.CplD_Index + board.Rx_TLP_Length;
board.tx_MRd_Tag_k = board.tx_MRd_Tag_k + 1;
board.Tx_MRd_Leng = 'H80;
$display("%d ns: Polling the DMA status", $time);
board.Hdr_Array[0] = `HEADER0_MRD4_ | 'H01;
board.Hdr_Array[1] = {`C_HOST_RDREQ_ID, 3'H3, board.Rx_MRd_Tag, 4'Hf, 4'Hf};
board.Hdr_Array[2] = 'h0;
board.Hdr_Array[3] = `C_ADDR_DMA_DS_STA;
TLP_Feed_Rx(`C_BAR0_HIT);
board.Rx_MRd_Tag = board.Rx_MRd_Tag + 1;
//2nd CplD
board.Hdr_Array[0] = `HEADER0_CPLD | board.Rx_TLP_Length[9:0];
...
...
@@ -589,6 +605,14 @@ begin
TLP_Feed_Rx(`C_NO_BAR_HIT);
board.CplD_Index = board.CplD_Index + board.Rx_TLP_Length;
$display("%d ns: Polling the DMA status", $time);
board.Hdr_Array[0] = `HEADER0_MRD4_ | 'H01;
board.Hdr_Array[1] = {`C_HOST_RDREQ_ID, 3'H3, board.Rx_MRd_Tag, 4'Hf, 4'Hf};
board.Hdr_Array[2] = 'h0;
board.Hdr_Array[3] = `C_ADDR_DMA_DS_STA;
TLP_Feed_Rx(`C_BAR0_HIT);
board.Rx_MRd_Tag = board.Rx_MRd_Tag + 1;
board.Hdr_Array[0] = `HEADER0_CPLD | board.Rx_TLP_Length[9:0];
board.Hdr_Array[1] = {`C_HOST_CPLD_ID, 4'H0, board.Tx_MRd_Leng[9:0], 2'b00};
board.Hdr_Array[2] = {board.localID, board.tx_MRd_Tag_k, 1'b0, board.Tx_MRd_Addr[6:0]};
...
...
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