Commit b2ea2f97 authored by Lucas Russo's avatar Lucas Russo

modules/*/wb_acq_core/acq_trigger.vhd: fix trigger alignment hazard

If we are not using internal trigger detection,
we should not be holding the trigger to the
delayed valid sample.
parent e07c8a60
......@@ -359,7 +359,7 @@ begin
else
if trig_d = '1' then
trig_align <= '1';
elsif acq_valid_pipe(c_trig_det_delay-1) = '1' then
elsif acq_valid_sel_out = '1' then
trig_align <= '0';
end if;
end if;
......
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