hdl/modules/fmc_adc_common/*: add option to disable bufmr

On 7-SERIES FPGAs, we need to explicitily instantiate a BUFMR primitive in order to use a MRCC pin as a drive to a Multi-Region BUFR or BUFIO. Now, we can select which ones of used clocks are LOCed to MRCC pins and which ones are not.

hdl/modules/fmc_adc_common/*: add option to disable bufmr
On 7-SERIES FPGAs, we need to explicitily instantiate a BUFMR primitive in order to use a MRCC pin as a drive to a Multi-Region BUFR or BUFIO. Now, we can select which ones of used clocks are LOCed to MRCC pins and which ones are not.
b54e22bd · Lucas Russo · 7b41151f · b54e22bd · b54e22bd · b54e22bd
Commit b54e22bd authored May 10, 2014 by Lucas Russo
Showing with 10 additions and 2 deletions

fmc_adc_clk.vhd hdl/modules/fmc_adc_common/fmc_adc_clk.vhd +3 -2

fmc_adc_iface.vhd hdl/modules/fmc_adc_common/fmc_adc_iface.vhd +2 -0

fmc_adc_pkg.vhd hdl/modules/fmc_adc_common/fmc_adc_pkg.vhd +5 -0

No files found.
--- a/hdl/modules/fmc_adc_common/fmc_adc_clk.vhd
+++ b/hdl/modules/fmc_adc_common/fmc_adc_clk.vhd
@@ -38,6 +38,7 @@ generic
  g_with_ref_clk                            : boolean := false;
  g_mmcm_param                              : t_mmcm_param := default_mmcm_param;
  g_with_fn_dly_select                      : boolean := false;
+  g_mrcc_pin                                : boolean := false;
  g_with_bufio                              : boolean := true;
  g_with_bufr                               : boolean := true;
  g_sim                                     : integer := 0
@@ -273,7 +274,7 @@ begin

     -- We either have BUFIO + BUFR or just BUFR. We only
     -- have to check for BUFR, then.
-    gen_bufmr_7_series : if (g_with_bufr) generate
+    gen_bufmr_7_series : if (g_mrcc_pin) generate

      -- 1-bit output: Clock output (connect to BUFIOs/BUFRs)
      -- 1-bit input: Clock input (Connect to IBUFG)
@@ -288,7 +289,7 @@ begin

    end generate;

-    gen_not_bufmr_7_series : if (not g_with_bufr) generate
+    gen_not_bufmr_7_series : if (not g_mrcc_pin) generate

      adc_clk_bufio_in                        <= adc_clk_ibufgds_dly;
      adc_clk_bufr_in                         <= adc_clk_ibufgds_dly;

--- a/hdl/modules/fmc_adc_common/fmc_adc_iface.vhd
+++ b/hdl/modules/fmc_adc_common/fmc_adc_iface.vhd
@@ -59,6 +59,7 @@ generic
  g_data_default_dly                        : t_default_adc_dly := default_data_dly;
  g_ref_clk                                 : t_ref_adc_clk := default_ref_adc_clk;
  g_mmcm_param                              : t_mmcm_param := default_mmcm_param;
+  g_mrcc_pin_chains                         : t_clk_mrcc_pin_chain := default_clk_mrcc_pin_chain;
  g_with_bufio_clk_chains                   : t_clk_use_bufio_chain := default_clk_use_bufio_chain;
  g_with_bufr_clk_chains                    : t_clk_use_bufr_chain := default_clk_use_bufr_chain;
  g_with_data_sdr                           : boolean := false;
@@ -209,6 +210,7 @@ begin
        g_with_ref_clk                      => f_with_ref_clk(i, g_ref_clk),
        g_mmcm_param                        => g_mmcm_param,
        g_with_fn_dly_select                => g_with_fn_dly_select,
+        g_mrcc_pin                          => f_std_logic_to_bool(g_mrcc_pin_chains(i)),
        g_with_bufio                        => f_std_logic_to_bool(g_with_bufio_clk_chains(i)),
        g_with_bufr                         => f_std_logic_to_bool(g_with_bufr_clk_chains(i)),
        g_sim                               => g_sim

--- a/hdl/modules/fmc_adc_common/fmc_adc_pkg.vhd
+++ b/hdl/modules/fmc_adc_common/fmc_adc_pkg.vhd
@@ -201,6 +201,7 @@ package fmc_adc_pkg is
  subtype t_clk_values_array is t_real_array(c_num_adc_channels-1 downto 0);
  subtype t_clk_use_chain is std_logic_vector(c_num_adc_channels-1 downto 0);
  subtype t_data_use_chain is std_logic_vector(c_num_adc_channels-1 downto 0);
+  subtype t_clk_mrcc_pin_chain is std_logic_vector(c_num_adc_channels-1 downto 0);
  subtype t_clk_use_bufio_chain is std_logic_vector(c_num_adc_channels-1 downto 0);
  subtype t_clk_use_bufr_chain is std_logic_vector(c_num_adc_channels-1 downto 0);
  subtype t_map_clk_data_chain is t_integer_array(c_num_adc_channels-1 downto 0);
@@ -217,6 +218,8 @@ package fmc_adc_pkg is
    ("0011");
  constant default_data_use_chain : t_data_use_chain :=
    ("1111");
+  constant default_clk_mrcc_pin_chain: t_clk_mrcc_pin_chain :=
+    ("0000");
  constant default_clk_use_bufio_chain : t_clk_use_bufio_chain :=
    ("1111");
  constant default_clk_use_bufr_chain : t_clk_use_bufr_chain :=
@@ -340,6 +343,7 @@ package fmc_adc_pkg is
    g_with_ref_clk                            : boolean := false;
    g_mmcm_param                              : t_mmcm_param := default_mmcm_param;
    g_with_fn_dly_select                      : boolean := false;
+    g_mrcc_pin                                : boolean := false;
    g_with_bufio                              : boolean := true;
    g_with_bufr                               : boolean := true;
    g_sim                                     : integer := 0
@@ -455,6 +459,7 @@ package fmc_adc_pkg is
    g_data_default_dly                        : t_default_adc_dly := default_data_dly;
    g_ref_clk                                 : t_ref_adc_clk := default_ref_adc_clk;
    g_mmcm_param                              : t_mmcm_param := default_mmcm_param;
+    g_mrcc_pin_chains                         : t_clk_mrcc_pin_chain := default_clk_mrcc_pin_chain;
    g_with_bufio_clk_chains                   : t_clk_use_bufio_chain := default_clk_use_bufio_chain;
    g_with_bufr_clk_chains                    : t_clk_use_bufr_chain := default_clk_use_bufr_chain;
    g_with_data_sdr                           : boolean := false;