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Beam Positoning Monitor - Gateware
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Beam Positoning Monitor - Gateware
Commits
f87e2510
Commit
f87e2510
authored
Apr 06, 2016
by
Lucas Russo
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platform/artix7/afc_v3/ddr_core/*: update MIG to -2 FPGA speed grade
parent
60e8a31e
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mig_a.prj
hdl/platform/artix7/afc_v3/ddr_core/mig_a.prj
+1
-1
mig_b.prj
hdl/platform/artix7/afc_v3/ddr_core/mig_b.prj
+1
-1
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hdl/platform/artix7/afc_v3/ddr_core/mig_a.prj
View file @
f87e2510
...
...
@@ -8,7 +8,7 @@
<DataDepth_En>
1024
</DataDepth_En>
<LowPower_En>
ON
</LowPower_En>
<XADC_En>
Enabled
</XADC_En>
<TargetFPGA>
xc7a200t-ffg1156/-
1
</TargetFPGA>
<TargetFPGA>
xc7a200t-ffg1156/-
2
</TargetFPGA>
<Version>
2.3
</Version>
<SystemClock>
No Buffer
</SystemClock>
<ReferenceClock>
Use System Clock
</ReferenceClock>
...
...
hdl/platform/artix7/afc_v3/ddr_core/mig_b.prj
View file @
f87e2510
...
...
@@ -8,7 +8,7 @@
<DataDepth_En>
1024
</DataDepth_En>
<LowPower_En>
ON
</LowPower_En>
<XADC_En>
Enabled
</XADC_En>
<TargetFPGA>
xc7a200t-ffg1156/-
1
</TargetFPGA>
<TargetFPGA>
xc7a200t-ffg1156/-
2
</TargetFPGA>
<Version>
2.3
</Version>
<SystemClock>
No Buffer
</SystemClock>
<ReferenceClock>
Use System Clock
</ReferenceClock>
...
...
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