Commit f9ea8fc1 authored by Vitor Finotti's avatar Vitor Finotti

Moved extend_pulse_dyn to modules/dbe_common/

parent 6d2f9e35
modules = { "local" : ["reset_synch",
"pulse2level",
"pulse2level",
"trigger_rcv",
"counter_simple"] };
"counter_simple",
"extend_pulse_dyn"] };
files = [ "dbe_common_pkg.vhd" ];
......@@ -49,5 +49,20 @@ package dbe_common_pkg is
data_i : in std_logic;
pulse_o : out std_logic);
end component;
component extend_pulse_dyn
generic (
-- output pulse width in clk_i cycles
g_max_width : natural
);
port (
clk_i : in std_logic;
rst_n_i : in std_logic;
pulse_i : in std_logic;
pulse_width_i : in natural;
-- extended output pulse
extended_o : out std_logic);
end component;
end dbe_common_pkg;
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