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Conv TTL Blocking - Gateware
Commit ad80ca56 authored by Denia Bouhired-Ferrag's avatar Denia Bouhired-Ferrag
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Changed top file to use periods instead of duty cycles, same changes in conv_common_gw

parent 1d502af8
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Showing with 15 additions and 11 deletions
conv-common-gw @ 011fbe69
Subproject commit c2306023e6d051792806e5ac4eafa9ed05a0da53 Subproject commit 011fbe699bd86cfa0529fcef16d9c28ab61172ef
top/Release/conv_ttl_blo.vhd
View file @ ad80ca56
...@@ -317,6 +317,10 @@ begin ...@@ -317,6 +317,10 @@ begin
end if; end if;
end if; end if;
end process; end process;
-- Pulse input valid only after inhibit period is over -- Pulse input valid only after inhibit period is over
pulse_in <= (pulse_ttl or pulse_blo) when (inhibit_first_pulse_d0 = '0') else pulse_in <= (pulse_ttl or pulse_blo) when (inhibit_first_pulse_d0 = '0') else
...@@ -340,13 +344,13 @@ begin ...@@ -340,13 +344,13 @@ begin
-- Functionality enabled for versions 4 and above -- Functionality enabled for versions 4 and above
-- when version is below 4 then disable burst functionality -- when version is below 4 then disable burst functionality
burst_en_n <= '0' when pcbrev_i (5 downto 0) >= "010000" else '1'; -- burst_en_n <= '0' when pcbrev_i (5 downto 0) >= "010000" else '1';
--************************************************************************** --**************************************************************************
--This change code is only used as a hack for v3 boards, which are able to --This change code is only used as a hack for v3 boards, which are able to
-- support v4 functionality -- support v4 functionality
-- burst_en_n <= '0' when sw_gp_n_i(6)= '0' burst_en_n <= '0' when sw_gp_n_i(6)= '0'
-- else '1'; else '1';
--************************************************************************** --**************************************************************************
--============================================================================ --============================================================================
-- Instantiate common generic gateware for converter boards -- Instantiate common generic gateware for converter boards
...@@ -363,11 +367,11 @@ begin ...@@ -363,11 +367,11 @@ begin
g_pgen_fixed_width => true, g_pgen_fixed_width => true,
g_pgen_pwidth_lg => 24, g_pgen_pwidth_lg => 24,
g_pgen_pwidth_sh => 5, g_pgen_pwidth_sh => 5,
g_pgen_duty_cycle_div_cont=> 200, g_pgen_pperiod_cont=> 4800,
-- Minimum duty cycle supported for 1.2us pulse ~ max freq 104kHz -- Minimum period supported for 1.2us pulse ~ max freq 104kHz
g_pgen_duty_cycle_div_lg => 8, g_pgen_pperiod_lg => 191,
-- Minimum duty cycle supoported for 250ns pulse ~ max freq 2MHz -- Minimum period supported for 250ns pulse ~ max freq 2MHz
g_pgen_duty_cycle_div_sh => 2, g_pgen_pperiod_sh => 9,
g_pgen_gf_len => 1, g_pgen_gf_len => 1,
g_temp_decre_step_lg => (0,0,0,0,0,0,0,0,2500,731,220,250,40,85,50,125), g_temp_decre_step_lg => (0,0,0,0,0,0,0,0,2500,731,220,250,40,85,50,125),
g_temp_decre_step_sh => (0,0, 769, 31, 104, 14, 82, 0 ,0, 0, 0, 0, 0, 0, 0, 0), g_temp_decre_step_sh => (0,0, 769, 31, 104, 14, 82, 0 ,0, 0, 0, 0, 0, 0, 0, 0),
...@@ -411,6 +415,8 @@ begin ...@@ -411,6 +415,8 @@ begin
-- Front panel channels -- Front panel channels
pulse_i => pulse_in, pulse_i => pulse_in,
pulse_ttl_i => pulse_ttl,
pulse_blo_i => pulse_blo,
pulse_o => pulse_out, pulse_o => pulse_out,
-- Inverted pulse I/O -- Inverted pulse I/O
...@@ -511,9 +517,7 @@ begin ...@@ -511,9 +517,7 @@ begin
----------------------------------------- -----------------------------------------
-- LED outputs -- LED outputs
led_front_n_o <= not led_pulse; led_front_n_o <= not led_pulse;
--led_front_n_o <= "101010";
led_front_inv_n_o <= not led_inv_pulse; led_front_inv_n_o <= not led_inv_pulse;
--led_front_inv_n_o <= "1010";
led_rear_n_o <= not led_pulse; led_rear_n_o <= not led_pulse;
......
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