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Commits
305fc989
Commit
305fc989
authored
Feb 20, 2013
by
Theodor-Adrian Stana
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Plain Diff
I2C works. Merging with master branch and deleting current
parent
722c523e
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4 changed files
with
372 additions
and
153 deletions
+372
-153
BloV2.ucf
hdl/IMAGES/image1/constraints/V2/BloV2.ucf
+96
-0
image1.gise
hdl/IMAGES/image1/project/image1.gise
+147
-19
image1.xise
hdl/IMAGES/image1/project/image1.xise
+4
-4
i2c_slave_core.vhd
hdl/i2c_slave_wb_master/rtl/i2c_slave_core.vhd
+125
-130
No files found.
hdl/IMAGES/image1/constraints/V2/BloV2.ucf
View file @
305fc989
...
@@ -984,3 +984,99 @@ NET "FPGA_RTMP_N[2]" IOSTANDARD = LVCMOS33;
...
@@ -984,3 +984,99 @@ NET "FPGA_RTMP_N[2]" IOSTANDARD = LVCMOS33;
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[2]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[2]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[1]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[1]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[0]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[0]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_bit_cnt_slv[7]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_bit_cnt_slv[6]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_bit_cnt_slv[5]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_bit_cnt_slv[4]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_bit_cnt_slv[3]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_bit_cnt_slv[2]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_bit_cnt_slv[1]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_bit_cnt_slv[0]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_byte_cnt_slv[7]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_byte_cnt_slv[6]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_byte_cnt_slv[5]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_byte_cnt_slv[4]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_byte_cnt_slv[3]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_byte_cnt_slv[2]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_byte_cnt_slv[1]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/s_byte_cnt_slv[0]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[31]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[30]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[29]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[28]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[27]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[26]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[25]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[24]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[23]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[22]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[21]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[20]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[19]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[18]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[17]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[16]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[15]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[14]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[13]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[12]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[11]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[10]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[9]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[8]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[7]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[6]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[5]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[4]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[3]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[2]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[1]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/txsr[0]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[31]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[30]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[29]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[28]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[27]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[26]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[25]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[24]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[23]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[22]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[21]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[20]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[19]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[18]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[17]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[16]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[15]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[14]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[13]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[12]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[11]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[10]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[9]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[8]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[7]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[6]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[5]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[4]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[3]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[2]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[1]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/s_CTR0_slv[0]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[4]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[3]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[2]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[1]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm[0]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm_d0[4]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm_d0[3]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm_d0[2]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm_d0[1]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/i2c_SLA_fsm_d0[0]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/CTR0_i[7]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/CTR0_i[5]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/CTR0_i[4]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/CTR0_i[3]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/CTR0_i[2]" KEEP = "TRUE";
#NET "inst_image1_core/inst_i2c_slave/inst_i2c_slave_core/CTR0_i[1]" KEEP = "TRUE";
hdl/IMAGES/image1/project/image1.gise
View file @
305fc989
This diff is collapsed.
Click to expand it.
hdl/IMAGES/image1/project/image1.xise
View file @
305fc989
...
@@ -321,7 +321,7 @@
...
@@ -321,7 +321,7 @@
<property
xil_pn:name=
"JTAG Pin TDI"
xil_pn:value=
"Pull Up"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"JTAG Pin TDI"
xil_pn:value=
"Pull Up"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"JTAG Pin TDO"
xil_pn:value=
"Pull Up"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"JTAG Pin TDO"
xil_pn:value=
"Pull Up"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"JTAG Pin TMS"
xil_pn:value=
"Pull Up"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"JTAG Pin TMS"
xil_pn:value=
"Pull Up"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Keep Hierarchy"
xil_pn:value=
"
Yes"
xil_pn:valueState=
"non-
default"
/>
<property
xil_pn:name=
"Keep Hierarchy"
xil_pn:value=
"
No"
xil_pn:valueState=
"
default"
/>
<property
xil_pn:name=
"LUT Combining Map"
xil_pn:value=
"Off"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"LUT Combining Map"
xil_pn:value=
"Off"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"LUT Combining Xst"
xil_pn:value=
"Auto"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"LUT Combining Xst"
xil_pn:value=
"Auto"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Language"
xil_pn:value=
"All"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Language"
xil_pn:value=
"All"
xil_pn:valueState=
"default"
/>
...
@@ -445,8 +445,8 @@
...
@@ -445,8 +445,8 @@
<property
xil_pn:name=
"Run for Specified Time Translate"
xil_pn:value=
"true"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Run for Specified Time Translate"
xil_pn:value=
"true"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Safe Implementation"
xil_pn:value=
"No"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Safe Implementation"
xil_pn:value=
"No"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Security"
xil_pn:value=
"Enable Readback and Reconfiguration"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Security"
xil_pn:value=
"Enable Readback and Reconfiguration"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Selected Module Instance Name"
xil_pn:value=
"/image1_top_tb
/uut/inst_image1_core/inst_i2c_slave/inst_i2c_slave_core
"
xil_pn:valueState=
"non-default"
/>
<property
xil_pn:name=
"Selected Module Instance Name"
xil_pn:value=
"/image1_top_tb"
xil_pn:valueState=
"non-default"
/>
<property
xil_pn:name=
"Selected Simulation Root Source Node Behavioral"
xil_pn:value=
"work.i
2c_slave_core
"
xil_pn:valueState=
"non-default"
/>
<property
xil_pn:name=
"Selected Simulation Root Source Node Behavioral"
xil_pn:value=
"work.i
mage1_top_tb
"
xil_pn:valueState=
"non-default"
/>
<property
xil_pn:name=
"Selected Simulation Root Source Node Post-Map"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Selected Simulation Root Source Node Post-Map"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Selected Simulation Root Source Node Post-Route"
xil_pn:value=
"work.image1_top_tb"
xil_pn:valueState=
"non-default"
/>
<property
xil_pn:name=
"Selected Simulation Root Source Node Post-Route"
xil_pn:value=
"work.image1_top_tb"
xil_pn:valueState=
"non-default"
/>
<property
xil_pn:name=
"Selected Simulation Root Source Node Post-Translate"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Selected Simulation Root Source Node Post-Translate"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
...
@@ -469,7 +469,7 @@
...
@@ -469,7 +469,7 @@
<property
xil_pn:name=
"Source window"
xil_pn:value=
"false"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Source window"
xil_pn:value=
"false"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify 'define Macro Name and Value"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify 'define Macro Name and Value"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names"
xil_pn:value=
""
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names Behavioral"
xil_pn:value=
"work.i
2c_slave_core
"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names Behavioral"
xil_pn:value=
"work.i
mage1_top_tb
"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names Post-Map"
xil_pn:value=
"Default"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names Post-Map"
xil_pn:value=
"Default"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names Post-Route"
xil_pn:value=
"work.image1_top_tb"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names Post-Route"
xil_pn:value=
"work.image1_top_tb"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names Post-Translate"
xil_pn:value=
"Default"
xil_pn:valueState=
"default"
/>
<property
xil_pn:name=
"Specify Top Level Instance Names Post-Translate"
xil_pn:value=
"Default"
xil_pn:valueState=
"default"
/>
...
...
hdl/i2c_slave_wb_master/rtl/i2c_slave_core.vhd
View file @
305fc989
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