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gilsoriano authored
Known issues to resolved: - Implement FMOH bits: CLBR, FS, PG, SECT - Implement SPI1 CLK_DIV bit - Implement read operation in SPI module - Implement CTR1 bits: BOV, CBSF - Implement Write Page Operation in m25p32 This core starts to get ready.
6c8c04da
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IMAGES | ||
control/rtl | ||
ctdah_lib/rtl | ||
i2c_slave_wb_master | ||
m25p32 | ||
multiboot | ||
rtl | ||
spi_master_multifield | ||
trigger | ||
wr_core_demo |