HDL roadmap
The development of HDL code has been divided into functional blocks. Each functional block consist of a /rtl folder, a /test one and a documentation explaining its behaviour.
HDL Specifications
The following document establish the HDL Specifications to be followed.
User Guide
We're working in the user guide that can be found in our repo.
HDL Blocks Status
HDL Block | HDL name | Tested | Synthesizable | Documented |
Control | control | Developing | YES | NO |
I2C Slave to Wishbone Master | i2c_slave_wb_master | YES | YES | YES |
Pulse Trigger Control | trigger | YES | YES | YES |
Multiboot manager | multiboot | Developing | YES | YES |
EEPROM manager | To be developed | NO | NO | |
Time-tagging source | Under evaluation |
Bitstreams Status
Version | Functionality | Status | Synthesizable |
image1 | Complete but time-tagging | Integrating | NO |
image2 | Complete: final version | NO | NO |
Carlos Gil Soriano - February 24, 2011