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FMC ADC 100M 14b 4cha - Gateware
Commit 00c62657 authored by Dimitris Lampridis's avatar Dimitris Lampridis
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hdl: fixed typo in timetage core registers description

parent 8e4884b9
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hdl/ip_cores/timetag_core/wb_gen/timetag_core_regs.h
View file @ 00c62657
......@@ -3,7 +3,7 @@
* File : timetag_core_regs.h
* Author : auto-generated by wbgen2 from timetag_core_regs.wb
* Created : Thu Jun 16 17:23:36 2016
* Created : Tue Jun 21 11:42:34 2016
* Standard : ANSI C
THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE timetag_core_regs.wb
......@@ -43,9 +43,9 @@
/* definitions for register: Time trigger seconds register (upper) */
/* definitions for register: Timetag seconds register (lower) */
/* definitions for register: Time trigger seconds register (lower) */
/* definitions for register: Timetag coarse time register, system clock ticks (125MHz) */
/* definitions for register: Time trigger coarse time register, system clock ticks (125MHz) */
/* definitions for register: Trigger time-tag seconds register (upper) */
......@@ -80,9 +80,9 @@ PACKED struct TIMETAG_CORE_WB {
uint32_t COARSE;
/* [0xc]: REG Time trigger seconds register (upper) */
uint32_t TIME_TRIG_SECONDS_UPPER;
/* [0x10]: REG Timetag seconds register (lower) */
/* [0x10]: REG Time trigger seconds register (lower) */
uint32_t TIME_TRIG_SECONDS_LOWER;
/* [0x14]: REG Timetag coarse time register, system clock ticks (125MHz) */
/* [0x14]: REG Time trigger coarse time register, system clock ticks (125MHz) */
uint32_t TIME_TRIG_COARSE;
/* [0x18]: REG Trigger time-tag seconds register (upper) */
uint32_t TRIG_TAG_SECONDS_UPPER;
......
hdl/ip_cores/timetag_core/wb_gen/timetag_core_regs.htm
View file @ 00c62657
......@@ -38,8 +38,8 @@
<span style="margin-left: 20px; ">3.2. <A href="#sect_3_2">Timetag seconds register (lower)</a></span><br/>
<span style="margin-left: 20px; ">3.3. <A href="#sect_3_3">Timetag coarse time register, system clock ticks (125MHz)</a></span><br/>
<span style="margin-left: 20px; ">3.4. <A href="#sect_3_4">Time trigger seconds register (upper)</a></span><br/>
<span style="margin-left: 20px; ">3.5. <A href="#sect_3_5">Timetag seconds register (lower)</a></span><br/>
<span style="margin-left: 20px; ">3.6. <A href="#sect_3_6">Timetag coarse time register, system clock ticks (125MHz)</a></span><br/>
<span style="margin-left: 20px; ">3.5. <A href="#sect_3_5">Time trigger seconds register (lower)</a></span><br/>
<span style="margin-left: 20px; ">3.6. <A href="#sect_3_6">Time trigger coarse time register, system clock ticks (125MHz)</a></span><br/>
<span style="margin-left: 20px; ">3.7. <A href="#sect_3_7">Trigger time-tag seconds register (upper)</a></span><br/>
<span style="margin-left: 20px; ">3.8. <A href="#sect_3_8">Trigger time-tag seconds register (lower)</a></span><br/>
<span style="margin-left: 20px; ">3.9. <A href="#sect_3_9">Trigger time-tag coarse time (system clock ticks 125MHz) register</a></span><br/>
......@@ -147,7 +147,7 @@ TIME_TRIG_SECONDS_UPPER
REG
</td>
<td >
<A href="#TIME_TRIG_SECONDS_LOWER">Timetag seconds register (lower)</a>
<A href="#TIME_TRIG_SECONDS_LOWER">Time trigger seconds register (lower)</a>
</td>
<td class="td_code">
timetag_core_time_trig_seconds_lower
......@@ -164,7 +164,7 @@ TIME_TRIG_SECONDS_LOWER
REG
</td>
<td >
<A href="#TIME_TRIG_COARSE">Timetag coarse time register, system clock ticks (125MHz)</a>
<A href="#TIME_TRIG_COARSE">Time trigger coarse time register, system clock ticks (125MHz)</a>
</td>
<td class="td_code">
timetag_core_time_trig_coarse
......@@ -698,7 +698,7 @@ timetag_core_time_trig_seconds_upper_o[7:0]
</td>
<td class="td_pblock_right">
<b>Timetag seconds register (lower):</b>
<b>Time trigger seconds register (lower):</b>
</td>
<td class="td_arrow_right">
......@@ -749,7 +749,7 @@ timetag_core_time_trig_seconds_lower_o[31:0]
</td>
<td class="td_pblock_right">
<b>Timetag coarse time register, system clock ticks (125MHz):</b>
<b>Time trigger coarse time register, system clock ticks (125MHz):</b>
</td>
<td class="td_arrow_right">
......@@ -2428,7 +2428,7 @@ TIME_TRIG_SECONDS_UPPER
</b>[<i>read/write</i>]: Time trigger seconds
</ul>
<a name="TIME_TRIG_SECONDS_LOWER"></a>
<h3><a name="sect_3_5">3.5. Timetag seconds register (lower)</a></h3>
<h3><a name="sect_3_5">3.5. Time trigger seconds register (lower)</a></h3>
<table cellpadding=0 cellspacing=0 border=0>
<tr>
<td >
......@@ -2688,7 +2688,7 @@ TIME_TRIG_SECONDS_LOWER
</b>[<i>read/write</i>]: Time trigger seconds
</ul>
<a name="TIME_TRIG_COARSE"></a>
<h3><a name="sect_3_6">3.6. Timetag coarse time register, system clock ticks (125MHz)</a></h3>
<h3><a name="sect_3_6">3.6. Time trigger coarse time register, system clock ticks (125MHz)</a></h3>
<table cellpadding=0 cellspacing=0 border=0>
<tr>
<td >
......
hdl/ip_cores/timetag_core/wb_gen/timetag_core_regs.wb
View file @ 00c62657
......@@ -65,7 +65,7 @@ peripheral {
};
reg {
name = "Timetag seconds register (lower)";
name = "Time trigger seconds register (lower)";
description = "32 lower bits of seconds used for time trigger.";
prefix = "time_trig_seconds_lower";
......@@ -79,7 +79,7 @@ peripheral {
};
reg {
name = "Timetag coarse time register, system clock ticks (125MHz)";
name = "Time trigger coarse time register, system clock ticks (125MHz)";
description = "Coarse time counter clocked by 125MHz system clock.\nCounts from 0 to 125000000.";
prefix = "time_trig_coarse";
......
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