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FMC ADC 100M 14b 4cha - Gateware
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FMC ADC 100M 14b 4cha - Gateware
Commits
03827e03
Commit
03827e03
authored
Apr 08, 2016
by
Dimitris Lampridis
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hdl: allow samples to completely fill on-chip dprams
parent
cf77a2a2
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4 additions
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7 deletions
+4
-7
fmc_adc_100Ms_core.vhd
hdl/adc/rtl/fmc_adc_100Ms_core.vhd
+4
-7
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hdl/adc/rtl/fmc_adc_100Ms_core.vhd
View file @
03827e03
...
...
@@ -1177,7 +1177,8 @@ begin
-- Check acquisition configuration
-- Post-trigger sample must be > 0
-- Shot number must be > 0
-- Number of sample (+time-tag) in multi-shot must be < multi-shot ram size
-- Number of samples (+time-tag) in multi-shot must be <= multi-shot ram size
-- Number of samples = pre+1+post+2 (1 for trigger sample, 2 for time-tag)
p_acq_cfg_ok
:
process
(
sys_clk_i
)
begin
if
rising_edge
(
sys_clk_i
)
then
...
...
@@ -1187,7 +1188,8 @@ begin
acq_config_ok
<=
'0'
;
elsif
unsigned
(
shots_value
)
=
to_unsigned
(
0
,
shots_value
'length
)
then
acq_config_ok
<=
'0'
;
elsif
unsigned
(
pre_trig_value
)
+
unsigned
(
post_trig_value
)
+
4
>
to_unsigned
(
g_multishot_ram_size
,
pre_trig_value
'length
)
and
single_shot
=
'0'
then
elsif
single_shot
=
'0'
and
unsigned
(
pre_trig_value
)
+
unsigned
(
post_trig_value
)
+
3
>
to_unsigned
(
g_multishot_ram_size
,
pre_trig_value
'length
)
then
acq_config_ok
<=
'0'
;
else
acq_config_ok
<=
'1'
;
...
...
@@ -1195,11 +1197,6 @@ begin
end
if
;
end
process
p_acq_cfg_ok
;
--acq_config_ok <= '0' when (unsigned(post_trig_value) = to_unsigned(0, post_trig_value'length)) else
-- '0' when (unsigned(shots_value) = to_unsigned(0, shots_value'length)) else
-- '0' when (unsigned(pre_trig_value)+unsigned(post_trig_value)+4 > to_unsigned(g_multishot_ram_size, pre_trig_value'length) and single_shot = '0') else
-- '1';
-- FSM transitions
p_acq_fsm_transitions
:
process
(
sys_clk_i
,
sys_rst_n_i
)
begin
...
...
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