minor reset cleanup

bf0d09de · Dimitris Lampridis · 820b073a · 67d353ad · bf0d09de · bf0d09de
Commit bf0d09de authored May 20, 2019 by Dimitris Lampridis
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Showing with 4 additions and 8 deletions

general-cores hdl/ip_cores/general-cores +1 -1

fmc_adc_100Ms_core.vhd hdl/rtl/fmc_adc_100Ms_core.vhd +1 -1

fmc_adc_mezzanine.vhd hdl/rtl/fmc_adc_mezzanine.vhd +2 -6

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--- a/general-cores @ 67d353ad
+++ b/general-cores @ 67d353ad
-Subproject commit aeee595d5d0079f036d3eade44d479a8650f1285
+Subproject commit 67d353adecea74d6a29e21919ff714da94fd8c76
--- a/hdl/rtl/fmc_adc_100Ms_core.vhd
+++ b/hdl/rtl/fmc_adc_100Ms_core.vhd
@@ -415,7 +415,7 @@ begin
    port map(
      clk_sys_i    => sys_clk_i,
      clk_in_i     => fs_clk,
-      rst_n_i      => sys_rst_n_i,
+      rst_n_i      => '1',
      pps_p1_i     => '0',
      freq_o       => fs_freq_t,
      freq_valid_o => fs_freq_valid

--- a/hdl/rtl/fmc_adc_mezzanine.vhd
+++ b/hdl/rtl/fmc_adc_mezzanine.vhd
@@ -234,7 +234,7 @@ architecture rtl of fmc_adc_mezzanine is
  signal sys_sda_oe_n : std_logic;

  -- Mezzanine SPI
-  signal spi_din_t : std_logic_vector(3 downto 0);
+  signal spi_din_t : std_logic_vector(3 downto 0) := (others => '0');
  signal spi_ss_t  : std_logic_vector(7 downto 0);

  -- Mezzanine I2C for Si570
@@ -390,11 +390,7 @@ begin
  p_fmc_spi : process (sys_clk_i)
  begin
    if rising_edge(sys_clk_i) then
-      if sys_rst_n_i = '0' then
-        spi_din_t <= (others => '0');
-      else
-        spi_din_t <= spi_din_t(spi_din_t'LEFT-1 downto 0) & spi_din_i;
-      end if;
+      spi_din_t <= spi_din_t(spi_din_t'LEFT-1 downto 0) & spi_din_i;
    end if;
  end process p_fmc_spi;