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FMC ADC 100M 14b 4cha - Software
Commit 3e42958c authored by Federico Vaga's avatar Federico Vaga
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kernel: checkpatch fixes 

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 3adf48c7
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Showing with 37 additions and 24 deletions
kernel/fa-core.c
View file @ 3e42958c
...@@ -26,7 +26,7 @@ static int fa_show_sdb; ...@@ -26,7 +26,7 @@ static int fa_show_sdb;
module_param_named(show_sdb, fa_show_sdb, int, 0444); module_param_named(show_sdb, fa_show_sdb, int, 0444);
MODULE_PARM_DESC(show_sdb, "Print a dump of the gateware's SDB tree."); MODULE_PARM_DESC(show_sdb, "Print a dump of the gateware's SDB tree.");
static int fa_enable_test_data = 0; static int fa_enable_test_data;
module_param_named(enable_test_data, fa_enable_test_data, int, 0444); module_param_named(enable_test_data, fa_enable_test_data, int, 0444);
static int fa_internal_trig_test = 0; static int fa_internal_trig_test = 0;
...@@ -202,7 +202,8 @@ int zfad_fsm_command(struct fa_dev *fa, uint32_t command) ...@@ -202,7 +202,8 @@ int zfad_fsm_command(struct fa_dev *fa, uint32_t command)
struct zio_cset *cset = fa->zdev->cset; struct zio_cset *cset = fa->zdev->cset;
uint32_t val; uint32_t val;
if (command != FA100M14B4C_CMD_START && command != FA100M14B4C_CMD_STOP) { if (command != FA100M14B4C_CMD_START &&
command != FA100M14B4C_CMD_STOP) {
dev_info(dev, "Invalid command %i\n", command); dev_info(dev, "Invalid command %i\n", command);
return -EINVAL; return -EINVAL;
} }
...@@ -387,7 +388,7 @@ static int __fa_init(struct fa_dev *fa) ...@@ -387,7 +388,7 @@ static int __fa_init(struct fa_dev *fa)
fa_writel(fa, fa->fa_utc_base, &zfad_regs[ZFA_UTC_SECONDS], fa_writel(fa, fa->fa_utc_base, &zfad_regs[ZFA_UTC_SECONDS],
get_seconds()); get_seconds());
/* /*
* Set Trigger delay in order to compensate * Set Trigger delay in order to compensate
* the channel signal transmission delay * the channel signal transmission delay
*/ */
......
kernel/fa-irq.c
View file @ 3e42958c
...@@ -62,7 +62,7 @@ int zfad_dma_start(struct zio_cset *cset) ...@@ -62,7 +62,7 @@ int zfad_dma_start(struct zio_cset *cset)
/* Fix dev_mem_addr in single-shot mode */ /* Fix dev_mem_addr in single-shot mode */
if (fa->n_shots == 1) { if (fa->n_shots == 1) {
int nchan = FA100M14B4C_NCHAN; int nchan = FA100M14B4C_NCHAN;
struct zio_control *ctrl = cset->chan[FA100M14B4C_NCHAN].current_ctrl; struct zio_control *ctrl = cset->chan[nchan].current_ctrl;
/* get pre-samples from the current control (interleave chan) */ /* get pre-samples from the current control (interleave chan) */
pre_samp = ctrl->attr_trigger.std_val[ZIO_ATTR_TRIG_PRE_SAMP]; pre_samp = ctrl->attr_trigger.std_val[ZIO_ATTR_TRIG_PRE_SAMP];
...@@ -136,9 +136,12 @@ void zfad_dma_done(struct zio_cset *cset) ...@@ -136,9 +136,12 @@ void zfad_dma_done(struct zio_cset *cset)
ctrl->tstamp.bins = *(++trig_timetag); ctrl->tstamp.bins = *(++trig_timetag);
/* Acquisition start Timetag */ /* Acquisition start Timetag */
ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_S] = ztstamp.secs; ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_S] =
ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_C] = ztstamp.ticks; ztstamp.secs;
ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_F] = ztstamp.bins; ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_C] =
ztstamp.ticks;
ctrl->attr_channel.ext_val[FA100M14B4C_DATTR_ACQ_START_F] =
ztstamp.bins;
/* /*
* resize the datalen, by removing the trigger tstamp and the * resize the datalen, by removing the trigger tstamp and the
...@@ -314,8 +317,9 @@ static void fa_get_irq_status(struct fa_dev *fa, int irq_core_base, ...@@ -314,8 +317,9 @@ static void fa_get_irq_status(struct fa_dev *fa, int irq_core_base,
/* Get current interrupts status */ /* Get current interrupts status */
*irq_status = fa_readl(fa, irq_core_base, &zfad_regs[ZFA_IRQ_ADC_SRC]); *irq_status = fa_readl(fa, irq_core_base, &zfad_regs[ZFA_IRQ_ADC_SRC]);
dev_dbg(&fa->fmc->dev, "core ADC: 0x%x fired an interrupt. IRQ status register: 0x%x\n", dev_dbg(&fa->fmc->dev,
irq_core_base, *irq_status); "IRQ 0x%x fired an interrupt. IRQ status register: 0x%x\n",
irq_core_base, *irq_status);
if (*irq_status) if (*irq_status)
/* Clear current interrupts status */ /* Clear current interrupts status */
......
kernel/fa-spec-core.c
View file @ 3e42958c
...@@ -40,7 +40,7 @@ static int fa_spec_init(struct fa_dev *fa) ...@@ -40,7 +40,7 @@ static int fa_spec_init(struct fa_dev *fa)
fmc_find_sdb_device(fa->fmc->sdb, 0xce42, 0xd5735ab4, NULL); fmc_find_sdb_device(fa->fmc->sdb, 0xce42, 0xd5735ab4, NULL);
dev_info(msgdev, dev_info(msgdev,
"Spec Base addrs: irq_dmma:0x%x, dma_ctrl:0x%x, csr:0x%x \n", "Spec Base addrs: irq_dmma:0x%x, dma_ctrl:0x%x, csr:0x%x\n",
cdata->fa_irq_dma_base, cdata->fa_dma_base, cdata->fa_irq_dma_base, cdata->fa_dma_base,
fa->fa_carrier_csr_base); fa->fa_carrier_csr_base);
......
kernel/fa-svec-dma.c
View file @ 3e42958c
...@@ -104,7 +104,7 @@ int fa_svec_dma_start(struct zio_cset *cset) ...@@ -104,7 +104,7 @@ int fa_svec_dma_start(struct zio_cset *cset)
/* Execute DMA shot by shot */ /* Execute DMA shot by shot */
for (i = 0; i < fa->n_shots; ++i) { for (i = 0; i < fa->n_shots; ++i) {
pr_debug("configure DMA descriptor shot %d " pr_debug("configure DMA descriptor shot %d "
"vme addr: 0x%llx destination address: 0x%p len: %d \n", "vme addr: 0x%llx destination address: 0x%p len: %d\n",
i, (long long)vme_addr, fa_dma_block[i].block->data, i, (long long)vme_addr, fa_dma_block[i].block->data,
(int)fa_dma_block[i].block->datalen); (int)fa_dma_block[i].block->datalen);
build_dma_desc(&desc, vme_addr, build_dma_desc(&desc, vme_addr,
......
kernel/fa-zio-trg.c
View file @ 3e42958c
...@@ -44,38 +44,48 @@ static struct zio_attribute zfat_ext_zattr[] = { ...@@ -44,38 +44,48 @@ static struct zio_attribute zfat_ext_zattr[] = {
* 0: internal (data threshold) * 0: internal (data threshold)
* 1: external (front panel trigger input) * 1: external (front panel trigger input)
*/ */
[FA100M14B4C_TATTR_EXT] = ZIO_ATTR_EXT("external", ZIO_RW_PERM, ZFAT_CFG_HW_SEL, 0), [FA100M14B4C_TATTR_EXT] = ZIO_ATTR_EXT("external", ZIO_RW_PERM,
ZFAT_CFG_HW_SEL, 0),
/* /*
* Internal Hardware trigger polarity * Internal Hardware trigger polarity
* 0: positive edge/slope * 0: positive edge/slope
* 1: negative edge/slope * 1: negative edge/slope
*/ */
[FA100M14B4C_TATTR_POL] = ZIO_ATTR_EXT("polarity", ZIO_RW_PERM, ZFAT_CFG_HW_POL, 0), [FA100M14B4C_TATTR_POL] = ZIO_ATTR_EXT("polarity", ZIO_RW_PERM,
ZFAT_CFG_HW_POL, 0),
/* /*
* Channel selection for internal trigger * Channel selection for internal trigger
* 0: channel 1, 1: channel 2, 2: channel 3, 3: channel 4 * 0: channel 1, 1: channel 2, 2: channel 3, 3: channel 4
*/ */
[FA100M14B4C_TATTR_INT_CHAN] = ZIO_ATTR_EXT("int-channel", ZIO_RW_PERM, ZFAT_CFG_INT_SEL, 0), [FA100M14B4C_TATTR_INT_CHAN] = ZIO_ATTR_EXT("int-channel",
ZIO_RW_PERM, ZFAT_CFG_INT_SEL, 0),
/* Internal trigger threshold value is 2 complement format */ /* Internal trigger threshold value is 2 complement format */
[FA100M14B4C_TATTR_INT_THRES] = ZIO_ATTR_EXT("int-threshold", ZIO_RW_PERM, ZFAT_CFG_THRES, 0), [FA100M14B4C_TATTR_INT_THRES] = ZIO_ATTR_EXT("int-threshold",
ZIO_RW_PERM, ZFAT_CFG_THRES, 0),
/* /*
* Delay to apply on the trigger in sampling clock period. The default * Delay to apply on the trigger in sampling clock period. The default
* clock frequency is 100MHz (period = 10ns) * clock frequency is 100MHz (period = 10ns)
*/ */
[FA100M14B4C_TATTR_DELAY] = ZIO_ATTR_EXT("delay", ZIO_RW_PERM, ZFAT_DLY, 0), [FA100M14B4C_TATTR_DELAY] = ZIO_ATTR_EXT("delay", ZIO_RW_PERM,
ZFAT_DLY, 0),
/* setup the maximum glith length to filter */ /* setup the maximum glith length to filter */
ZIO_ATTR_EXT("int-threshold-filter", ZIO_RW_PERM, ZFAT_CFG_THRES_FILT, ZIO_ATTR_EXT("int-threshold-filter", ZIO_RW_PERM, ZFAT_CFG_THRES_FILT,
0), 0),
/* Software Trigger */ /* Software Trigger */
/* Enable (1) or disable (0) software trigger */ /* Enable (1) or disable (0) software trigger */
[FA100M14B4C_TATTR_SW_EN] = ZIO_PARAM_EXT("sw-trg-enable", ZIO_RW_PERM, ZFAT_CFG_SW_EN, 0), [FA100M14B4C_TATTR_SW_EN] = ZIO_PARAM_EXT("sw-trg-enable", ZIO_RW_PERM,
[FA100M14B4C_TATTR_SW_FIRE] = ZIO_PARAM_EXT("sw-trg-fire", ZIO_WO_PERM, ZFAT_SW, 0), ZFAT_CFG_SW_EN, 0),
[FA100M14B4C_TATTR_SW_FIRE] = ZIO_PARAM_EXT("sw-trg-fire", ZIO_WO_PERM,
ZFAT_SW, 0),
/* last trigger time stamp */ /* last trigger time stamp */
[FA100M14B4C_TATTR_TRG_S] = ZIO_PARAM_EXT("tstamp-trg-lst-s", ZIO_RO_PERM, ZFA_UTC_TRIG_SECONDS, 0), [FA100M14B4C_TATTR_TRG_S] = ZIO_PARAM_EXT("tstamp-trg-lst-s",
[FA100M14B4C_TATTR_TRG_C] = ZIO_PARAM_EXT("tstamp-trg-lst-t", ZIO_RO_PERM, ZFA_UTC_TRIG_COARSE, 0), ZIO_RO_PERM, ZFA_UTC_TRIG_SECONDS, 0),
[FA100M14B4C_TATTR_TRG_F] = ZIO_PARAM_EXT("tstamp-trg-lst-b", ZIO_RO_PERM, ZFA_UTC_TRIG_FINE, 0), [FA100M14B4C_TATTR_TRG_C] = ZIO_PARAM_EXT("tstamp-trg-lst-t",
ZIO_RO_PERM, ZFA_UTC_TRIG_COARSE, 0),
[FA100M14B4C_TATTR_TRG_F] = ZIO_PARAM_EXT("tstamp-trg-lst-b",
ZIO_RO_PERM, ZFA_UTC_TRIG_FINE, 0),
}; };
...@@ -122,9 +132,7 @@ static int zfat_conf_set(struct device *dev, struct zio_attribute *zattr, ...@@ -122,9 +132,7 @@ static int zfat_conf_set(struct device *dev, struct zio_attribute *zattr,
*/ */
break; break;
case ZFAT_DLY: case ZFAT_DLY:
/* /* Add channel signal transmission delay */
* Add channel signal transmision delay
*/
tmp_val += FA_CH_TX_DELAY; tmp_val += FA_CH_TX_DELAY;
} }
......
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