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FMC ADC 100M 14b 4cha - Testing
Commit c9145287 authored by Matthieu Cattin's avatar Matthieu Cattin
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test28: Optimise ddr clear, converts raw data to volts for every dma. 

Instead of doing it at the end after all dma.
parent 6c6a8b7a
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Showing with 61 additions and 26 deletions
test/fmcadc100m14b4cha/python/test28.py
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...@@ -138,17 +138,36 @@ def volt2digital_without_offset(value, full_scale, nb_bit): ...@@ -138,17 +138,36 @@ def volt2digital_without_offset(value, full_scale, nb_bit):
# Clear DDR memory (fill with zeros) # Clear DDR memory (fill with zeros)
def clear_ddr(carrier, verbose=False): def clear_ddr(carrier, verbose=False):
if verbose:
print("Clearing DDR memory")
# dma item size = 4096 bytes # dma item size = 4096 bytes
# max linked items = 128 # max linked items per page= 128
# 2**28/(4096*128) = 512 # 2**28/(4096*128) = 512
pattern = 0x0 pattern = 0x0
carrier.set_irq_en_mask(0x1) length = 2**27-(128*4096)
# Enable "DMA done" interrupt
carrier.set_irq_dma_done_mask(1)
#carrier.print_irq_controller_regs()
# Test number of dma transfer required (max dma size limitation of gnurabbit driver)
dma_required = int(math.ceil((MEMORY_SIZE<<3)/float(254*DMA_ITEM_SIZE*DMA_MAX_ITEMS)))
start_byte_addr = 0
if verbose: if verbose:
print("Clearing DDR memory") print("%d DMA are required"%(dma_required))
for i in range(512): data = []
carrier.put_data(i*DMA_ITEM_SIZE*DMA_MAX_ITEMS, pattern, DMA_ITEM_SIZE*DMA_MAX_ITEMS) for dma in range(dma_required):
if dma+1 == dma_required:
dma_length = (MEMORY_SIZE<<3) - (dma * DMA_ITEM_SIZE * DMA_MAX_ITEMS * 254)
else:
dma_length = DMA_ITEM_SIZE * DMA_MAX_ITEMS * 254
if verbose: if verbose:
print("DMA #%d"%i) print("DMA #%d: start: %d, end %d, length: %d"%(dma, start_byte_addr, start_byte_addr+dma_length, dma_length))
# Perform dma transfer
dma_data = carrier.clear_ddr(start_byte_addr, pattern, dma_length, False)
# Incerment dma start address
start_byte_addr += dma_length
# Disable "DMA done" interrupt
carrier.set_irq_dma_done_mask(0)
# Set AWG (sine wave) # Set AWG (sine wave)
def set_awg(awg, freq, ampl, offset, verbose=False): def set_awg(awg, freq, ampl, offset, verbose=False):
...@@ -164,6 +183,7 @@ def set_awg(awg, freq, ampl, offset, verbose=False): ...@@ -164,6 +183,7 @@ def set_awg(awg, freq, ampl, offset, verbose=False):
awg.play(sine) awg.play(sine)
awg.output = True awg.output = True
awg.sync = True awg.sync = True
time.sleep(AWG_SET_SLEEP)
# Get best adc input range for a given amplitude # Get best adc input range for a given amplitude
def get_best_input_range(in_ampl, term, verbose=False): def get_best_input_range(in_ampl, term, verbose=False):
...@@ -229,7 +249,11 @@ def make_acq(fmc, verbose=False): ...@@ -229,7 +249,11 @@ def make_acq(fmc, verbose=False):
if verbose: if verbose:
print("Starting acquisition...") print("Starting acquisition...")
fmc.start_acq() fmc.start_acq()
time.sleep(0.01) # Random time before trigger
time_to_trig = rdm.randrange(1, 1000)/1000.0
if verbose:
print("Time between acquisition start and trigger: %fs"%(time_to_trig))
time.sleep(time_to_trig)
fmc.sw_trig() fmc.sw_trig()
# Wait end of acquisition # Wait end of acquisition
timeout = 0 timeout = 0
...@@ -243,12 +267,11 @@ def make_acq(fmc, verbose=False): ...@@ -243,12 +267,11 @@ def make_acq(fmc, verbose=False):
print("Acquisition finished.") print("Acquisition finished.")
# Make a linked list dma # Make a linked list dma
def make_dma(carrier, start_byte_addr, length_bytes, verbose=False): def make_dma(carrier, start_byte_addr, length_bytes, in_range, verbose=False):
# Enable "DMA done" interrupt # Enable "DMA done" interrupt
carrier.set_irq_dma_done_mask(1) carrier.set_irq_dma_done_mask(1)
#carrier.print_irq_controller_regs() #carrier.print_irq_controller_regs()
# Test number of dma transfer required (max dma size limitation of gnurabbit driver) # Test number of dma transfer required (max dma size limitation of gnurabbit driver)
# Perform data retrieve from DDR memory
dma_required = int(math.ceil(length_bytes/float(DMA_ITEM_SIZE*DMA_MAX_ITEMS))) dma_required = int(math.ceil(length_bytes/float(DMA_ITEM_SIZE*DMA_MAX_ITEMS)))
if verbose: if verbose:
print("%d DMA are required"%(dma_required)) print("%d DMA are required"%(dma_required))
...@@ -258,9 +281,14 @@ def make_dma(carrier, start_byte_addr, length_bytes, verbose=False): ...@@ -258,9 +281,14 @@ def make_dma(carrier, start_byte_addr, length_bytes, verbose=False):
dma_length = length_bytes-(dma * DMA_ITEM_SIZE * DMA_MAX_ITEMS) dma_length = length_bytes-(dma * DMA_ITEM_SIZE * DMA_MAX_ITEMS)
else: else:
dma_length = DMA_ITEM_SIZE * DMA_MAX_ITEMS dma_length = DMA_ITEM_SIZE * DMA_MAX_ITEMS
if verbose: #if verbose:
print("DMA #%d: start: %d, end %d, length: %d"%(dma, start_byte_addr, start_byte_addr+dma_length, dma_length)) # print("DMA #%d: start: %d, end %d, length: %d"%(dma, start_byte_addr, start_byte_addr+dma_length, dma_length))
data += carrier.get_data(start_byte_addr, dma_length) # Perform dma transfer
dma_data = carrier.get_data(start_byte_addr, dma_length)
# Converts raw data to volts
fs = RANGES[in_range]
data += [digital2volt(hex2signed(sample), fs, ADC_NBITS) for sample in dma_data]
# Incerment dma start address
start_byte_addr += dma_length start_byte_addr += dma_length
# Disable "DMA done" interrupt # Disable "DMA done" interrupt
carrier.set_irq_dma_done_mask(0) carrier.set_irq_dma_done_mask(0)
...@@ -270,6 +298,11 @@ def make_dma(carrier, start_byte_addr, length_bytes, verbose=False): ...@@ -270,6 +298,11 @@ def make_dma(carrier, start_byte_addr, length_bytes, verbose=False):
# Get data from DDR memory # Get data from DDR memory
def get_acq_data(carrier, fmc, samples, pre_trig_samples, nb_shots, in_range, verbose=False): def get_acq_data(carrier, fmc, samples, pre_trig_samples, nb_shots, in_range, verbose=False):
#######################################
#pre_trig_samples += 100
samples += 1000
######################################
if nb_shots == 1: if nb_shots == 1:
#----------------------------------------------------------------------- #-----------------------------------------------------------------------
# Single shot case # Single shot case
...@@ -288,9 +321,9 @@ def get_acq_data(carrier, fmc, samples, pre_trig_samples, nb_shots, in_range, ve ...@@ -288,9 +321,9 @@ def get_acq_data(carrier, fmc, samples, pre_trig_samples, nb_shots, in_range, ve
start_pos = trig_pos - pre_trig_samples start_pos = trig_pos - pre_trig_samples
if verbose: if verbose:
print("Trigger position (samples) : 0x%8X %d" % (trig_pos,trig_pos)) print("Trigger position (samples) : %d" % (trig_pos))
print("Acqisition start position (samples): %d" % (start_pos)) print("Acqisition start position (samples): %d" % (start_pos))
print("Samples + start position (samples) : %d" % (start_pos+samples)) print("Total number of samples : %d" % (samples))
# Check if acquisition is overlapping ddr memory # Check if acquisition is overlapping ddr memory
if start_pos + samples > MEMORY_SIZE: if start_pos + samples > MEMORY_SIZE:
...@@ -301,20 +334,20 @@ def get_acq_data(carrier, fmc, samples, pre_trig_samples, nb_shots, in_range, ve ...@@ -301,20 +334,20 @@ def get_acq_data(carrier, fmc, samples, pre_trig_samples, nb_shots, in_range, ve
length = (MEMORY_SIZE - start_pos)<<3 length = (MEMORY_SIZE - start_pos)<<3
if verbose: if verbose:
print("DMA start: %d(bytes), length: %d(bytes)"%(start, length)) print("DMA start: %d(bytes), length: %d(bytes)"%(start, length))
data = make_dma(carrier, start, length, True) data = make_dma(carrier, start, length, in_range, True)
# Second dma from 0 to end acq address # Second dma from 0 to end acq address
start = 0 start = 0
length = (sample - (MEMORY_SIZE - start_pos))<<3 length = (samples - (MEMORY_SIZE - start_pos))<<3
if verbose: if verbose:
print("DMA start: %d(bytes), length: %d(bytes)"%(start, length)) print("DMA start: %d(bytes), length: %d(bytes)"%(start, length))
data += make_dma(carrier, start, length, True) data += make_dma(carrier, start, length, in_range, True)
else: else:
start = start_pos<<3 start = start_pos<<3
length = samples<<3 length = samples<<3
if verbose: if verbose:
print("Acquisition is not overlapping") print("Acquisition is not overlapping")
print("DMA start: %d(bytes) %d, length: %d(bytes)"%(start, start%4, length)) print("DMA start: %d(bytes) %d, length: %d(bytes)"%(start, start%4, length))
data = make_dma(carrier, start, length, True) data = make_dma(carrier, start, length, in_range, True)
else: else:
#----------------------------------------------------------------------- #-----------------------------------------------------------------------
# Single shot case # Single shot case
...@@ -322,10 +355,10 @@ def get_acq_data(carrier, fmc, samples, pre_trig_samples, nb_shots, in_range, ve ...@@ -322,10 +355,10 @@ def get_acq_data(carrier, fmc, samples, pre_trig_samples, nb_shots, in_range, ve
pass pass
# Converts raw data to signed # Converts raw data to signed
data = [hex2signed(item) for item in data] #data = [hex2signed(item) for item in data]
# Converts signed data to volts # Converts signed data to volts
fs = RANGES[in_range] #fs = RANGES[in_range]
data = [digital2volt(item, fs, ADC_NBITS) for item in data] #data = [digital2volt(item, fs, ADC_NBITS) for item in data]
return data return data
...@@ -397,7 +430,7 @@ def main (default_directory='.'): ...@@ -397,7 +430,7 @@ def main (default_directory='.'):
# Clear DDR # Clear DDR
t1 = time.time() t1 = time.time()
#clear_ddr(carrier, False) clear_ddr(carrier, True)
t2 = time.time() t2 = time.time()
print "elapsed time: %.2f seconds\n" % (t2-t1) print "elapsed time: %.2f seconds\n" % (t2-t1)
...@@ -442,13 +475,15 @@ def main (default_directory='.'): ...@@ -442,13 +475,15 @@ def main (default_directory='.'):
acq_samples = rdm.randrange(acq_min_samples, MULTISHOT_MAX_SIZE+1) acq_samples = rdm.randrange(acq_min_samples, MULTISHOT_MAX_SIZE+1)
acq_nb_shots = rdm.randrange(1, (MEMORY_SIZE/acq_samples)+1) acq_nb_shots = rdm.randrange(1, (MEMORY_SIZE/acq_samples)+1)
else: else:
acq_samples = rdm.randrange(acq_min_samples, MEMORY_SIZE+1) #acq_samples = rdm.randrange(acq_min_samples, MEMORY_SIZE+1)
acq_samples = rdm.randrange(acq_min_samples, (MEMORY_SIZE/4)+1)
acq_nb_shots = 1 acq_nb_shots = 1
############################################################################
acq_samples = 50000
###########################################################################
print("Final number of samples: %d"%acq_samples) print("Final number of samples: %d"%acq_samples)
#####################################
#acq_samples = 100000
#####################################
# Choose the trigger position randomly # Choose the trigger position randomly
acq_pre_trig_samples = rdm.randrange(0, acq_samples+1) acq_pre_trig_samples = rdm.randrange(0, acq_samples+1)
acq_post_trig_samples = acq_samples - acq_pre_trig_samples acq_post_trig_samples = acq_samples - acq_pre_trig_samples
......
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