Technical Documentation
2020
-
Input Stage Simulation by Sundance
-
Design Manual by Sundance of an ADC mezzanine, 1 GSPS, 8bits, 2 channels, based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
- [Schematic] (Documents/Schematic) by Sundance of an ADC mezzanine, 1 GSPS, 8bits, 2 channels, based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
2019
-
Design Study by Sundance of an ADC mezzanine, 1 GSPS, 8bits, 2 channels, based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
2018
2015 (obsolete)
-
Preliminary study of an ADC mezzanine, 1 GSps, 10bits, 2 channels based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
2011 (obsolete)