triggerLogic_rtl.vhd - changed not to need VHDL-2008
tlu_1e.dep - changed to correct order to work with ipbb sim. Added VHDL-2008 flags
top_tim.dep - top level dep file to build simulation
infra_sim.vhd - infrastructure ( Ethernet Mac + IPBus control ) for simulation. IPBB not able to ignore synthesis only files