Added a common delay to all pulses ( needs changing ). Edited triggerlogic to accomodate this.

* Moved s_reset_timestamp_ipbus<='0' , might have been causing a bug in reset

* Edited TPix3_iface to allow the shutter and T0 to be set under IPBus control

* logic_clocks now chooses between external ( from 2-pole Lemo ) and internal ( from sysclk xtal ) clock using a generate statement and generic.

* DUTInterfaces - stretch output trigger pulse to two clock cycles.