Fix data formatting (incorrect timestamp).

From Tom's dma branch.

Fix data formatting (incorrect timestamp).
From Tom's dma branch.
560fc342 · Tristan Gingold · aa0db067 · 560fc342 · 560fc342 · 560fc342
Commit 560fc342 authored Sep 07, 2018 by Tristan Gingold
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Showing with 6 additions and 3 deletions

data_formatting.vhd hdl/rtl/data_formatting.vhd +4 -3

fmc_tdc_core.vhd hdl/rtl/fmc_tdc_core.vhd +1 -0

tdc_core_pkg.vhd hdl/rtl/tdc_core_pkg.vhd +1 -0

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--- a/hdl/rtl/data_formatting.vhd
+++ b/hdl/rtl/data_formatting.vhd
@@ -94,6 +94,7 @@ entity data_formatting is
     clk_i_cycles_offset_i   : in std_logic_vector(31 downto 0);
     roll_over_nb_i          : in std_logic_vector(31 downto 0);
     retrig_nb_offset_i      : in std_logic_vector(31 downto 0);
+     current_retrig_nb_i     : in std_logic_vector(31 downto 0);

     -- Signal from the WRabbit core or the one_hz_generator unit
     utc_p_i : in std_logic;
@@ -200,13 +201,13 @@ begin
        acam_channel        <= "0" & acam_tstamp1_i(27 downto 26);
        acam_fine_timestamp <= acam_tstamp1_i(16 downto 0);
        acam_slope          <= acam_tstamp1_i(17);
-        acam_start_nb       <= unsigned(acam_tstamp1_i(25 downto 18))-1;
+        acam_start_nb       <= unsigned(acam_tstamp1_i(25 downto 18));

      elsif acam_tstamp2_ok_p_i = '1' then
        acam_channel        <= "1" & acam_tstamp2_i(27 downto 26);
        acam_fine_timestamp <= acam_tstamp2_i(16 downto 0);
        acam_slope          <= acam_tstamp2_i(17);
-        acam_start_nb       <= unsigned(acam_tstamp2_i(25 downto 18))-1;
+        acam_start_nb       <= unsigned(acam_tstamp2_i(25 downto 18));
      end if;
    end if;
  end process;
@@ -290,7 +291,7 @@ begin
          un_retrig_nb_offset    <= unsigned(retrig_nb_offset_i);
          utc                    <= utc_i;
          coarse_zero            <= '0';
-          if roll_over_incr_recent_i = '1' and un_acam_start_nb > 192 then
+          if acam_start_nb = 255 and unsigned(current_retrig_nb_i) = 0 then
            un_retrig_from_roll_over <= shift_left(unsigned(roll_over_nb_i)-1, 8);
          else
            un_retrig_from_roll_over <= shift_left(unsigned(roll_over_nb_i), 8);

--- a/hdl/rtl/fmc_tdc_core.vhd
+++ b/hdl/rtl/fmc_tdc_core.vhd
@@ -509,6 +509,7 @@ begin
     clk_i_cycles_offset_i   => clk_i_cycles_offset,
     roll_over_nb_i          => roll_over_nb,
     retrig_nb_offset_i      => retrig_nb_offset,
+     current_retrig_nb_i     => current_retrig_nb,
     utc_p_i                 => utc_p,
     utc_i                   => utc,
     timestamp_o             => timestamp,

--- a/hdl/rtl/tdc_core_pkg.vhd
+++ b/hdl/rtl/tdc_core_pkg.vhd
@@ -718,6 +718,7 @@ package tdc_core_pkg is
      clk_i_cycles_offset_i   : in  std_logic_vector(31 downto 0);
      roll_over_nb_i          : in  std_logic_vector(31 downto 0);
      retrig_nb_offset_i      : in  std_logic_vector(31 downto 0);
+      current_retrig_nb_i     : in std_logic_vector(31 downto 0);
      utc_p_i                 : in  std_logic;
      timestamp_o             : out std_logic_vector(127 downto 0);
      timestamp_valid_o       : out std_logic);