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FMC TDC 1ns 5cha - Software
Commit 1fba8b50 authored by Samuel Iglesias Gonsálvez's avatar Samuel Iglesias Gonsálvez
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tdc: merge from siglesias-devel

parent 05ddc0e4
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Inline Side-by-side
Showing with 14 additions and 38 deletions
drivers/tdc-acam.c
View file @ 1fba8b50
......@@ -13,6 +13,7 @@
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <asm/io.h>
#include "tdc.h"
......@@ -69,6 +70,7 @@ int tdc_acam_load_config(struct spec_tdc *tdc, struct tdc_acam_cfg *cfg)
writel(cfg->edge_config, tdc->base + TDC_ACAM_CFG_REG_0);
writel(cfg->channel_adj, tdc->base + TDC_ACAM_CFG_REG_1);
writel(cfg->mode_enable, tdc->base + TDC_ACAM_CFG_REG_2);
mdelay(1000);
writel(cfg->resolution, tdc->base + TDC_ACAM_CFG_REG_3);
writel(cfg->start_timer_set, tdc->base + TDC_ACAM_CFG_REG_4);
writel(cfg->start_retrigger, tdc->base + TDC_ACAM_CFG_REG_5);
......@@ -80,6 +82,7 @@ int tdc_acam_load_config(struct spec_tdc *tdc, struct tdc_acam_cfg *cfg)
/* Send the load command to the firmware */
__tdc_acam_do_load_config(tdc);
mdelay(1000);
return 0;
}
......@@ -107,8 +110,6 @@ int tdc_acam_get_config(struct spec_tdc *tdc, struct tdc_acam_cfg *cfg)
int tdc_acam_set_default_config(struct spec_tdc *tdc)
{
struct tdc_acam_cfg cfg;
struct tdc_acam_cfg tmp;
int ret;
/* Default setup as indicated in the datasheet */
cfg.edge_config = 0x01F0FC81;
......@@ -123,19 +124,5 @@ int tdc_acam_set_default_config(struct spec_tdc *tdc)
cfg.int_flag_cfg = 0x04000000;
cfg.ctrl_16_bit_mode = 0x0;
ret = tdc_acam_load_config(tdc, &cfg);
tdc_acam_get_config(tdc, &tmp);
pr_err("tdc: cfg.edge_config = 0x%x/0x%x\n", tmp.edge_config, cfg.edge_config);
pr_err("tdc: cfg.channel_adj = 0x%x/0x%x\n", tmp.channel_adj, cfg.channel_adj);
pr_err("tdc: cfg.mode_enable = 0x%x/0x%x\n", tmp.mode_enable, cfg.mode_enable);
pr_err("tdc: cfg.resolution = 0x%x/0x%x\n", tmp.resolution, cfg.resolution);
pr_err("tdc: cfg.start_timer_set = 0x%x/0x%x\n", tmp.start_timer_set, cfg.start_timer_set);
pr_err("tdc: cfg.start_retrigger = 0x%x/0x%x\n", tmp.start_retrigger, cfg.start_retrigger);
pr_err("tdc: cfg.lf_flags_level = 0x%x/0x%x\n", tmp.lf_flags_level, cfg.lf_flags_level);
pr_err("tdc: cfg.pll = 0x%x/0x%x\n", tmp.pll, cfg.pll);
pr_err("tdc: cfg.err_flag_cfg = 0x%x/0x%x\n", tmp.err_flag_cfg, cfg.err_flag_cfg);
pr_err("tdc: cfg.int_flag_cfg = 0x%x/0x%x\n", tmp.int_flag_cfg, cfg.int_flag_cfg);
pr_err("tdc: cfg.ctrl_16_bit_mode = 0x%x/0x%x\n", tmp.ctrl_16_bit_mode, cfg.ctrl_16_bit_mode);
return ret;
return tdc_acam_load_config(tdc, &cfg);
}
drivers/tdc-core.c
View file @ 1fba8b50
......@@ -137,4 +137,4 @@ static void tdc_exit(void)
module_init(tdc_init);
module_exit(tdc_exit);
MODULE_LICENSE("GPL"); /* FIXME? Fine delay driver has LGPL (GPL and additional rights) */
MODULE_LICENSE("GPL");
drivers/tdc-fmc.c
View file @ 1fba8b50
......@@ -37,8 +37,7 @@ static void tdc_fmc_gennum_setup_local_clock(struct spec_tdc *tdc, int freq)
/* Setup local clock */
divot = 800/freq - 1;
data = 0xE001F00C + (divot << 4);
/* FIXME: Now setup for 160 MHz directly. */
writel(0x0001F04C, tdc->gn412x_regs + TDC_PCI_CLK_CSR);
writel(data, tdc->gn412x_regs + TDC_PCI_CLK_CSR);
}
static void tdc_fmc_fw_reset(struct spec_tdc *tdc)
......@@ -187,6 +186,7 @@ irqreturn_t tdc_fmc_irq_handler(int irq, void *dev_id)
wake_up(&fmc_wait_dma);
}
/* Acknowledge the IRQ and exit */
writel(irq_code, fmc->base + TDC_IRQ_STATUS_REG);
fmc->op->irq_ack(fmc);
return IRQ_HANDLED;
}
......@@ -222,15 +222,6 @@ int tdc_fmc_probe(struct fmc_device *dev)
tdc->gn412x_regs = spec->remap[2]; /* BAR 4 */
tdc->wr_pointer = 0;
/* XXX: Not implemented yet. Do we needed it? */
#if 0
/* Check if the device is DMA capable on 32 bits. */
if (pci_set_dma_mask(spec->pdev, DMA_BIT_MASK(64)) < 0) {
pr_err("error setting 64-bit DMA mask.\n");
kfree(tdc);
return -ENXIO;
}
#endif
for(i = 0; i < TDC_CHAN_NUMBER; i++)
sema_init(&tdc->event[i].lock, 0);
/* Setup the Gennum 412x local clock frequency */
......@@ -246,17 +237,19 @@ int tdc_fmc_probe(struct fmc_device *dev)
/* Initialize DAC */
tdc_set_dac_word(tdc, 0xA8F5);
/* Initialize timestamp threshold */
tdc_set_irq_tstamp_thresh(tdc, 255);
tdc_set_irq_tstamp_thresh(tdc, 0x100);
/* Initialize time threshold */
tdc_set_irq_time_thresh(tdc, 256);
tdc_set_irq_time_thresh(tdc, 0x10);
/* Prepare the irq work */
INIT_WORK(&tdc->irq_work, tdc_fmc_irq_work);
/* Clear IRQ */
writel(0xF, tdc->base + TDC_IRQ_STATUS_REG);
/* Request the IRQ */
dev->op->irq_request(dev, tdc_fmc_irq_handler, "spec-tdc", IRQF_SHARED);
/* Enable IRQ */
writel(0xC, tdc->base + TDC_IRQ_ENABLE_REG); /* FIXME: define constant 0xC */
writel(0xC, tdc->base + TDC_IRQ_ENABLE_REG);
return tdc_zio_register_device(tdc);
}
......@@ -266,8 +259,6 @@ int tdc_fmc_remove(struct fmc_device *dev)
struct spec_tdc *tdc = spec->sub_priv;
cancel_work_sync(&tdc->irq_work);
/* XXX: It gives a kernel oops if I enabled it. Check it out */
//flush_workqueue(tdc_workqueue);
tdc->fmc->op->irq_free(tdc->fmc);
tdc_zio_remove(tdc);
kfree(tdc);
......@@ -290,5 +281,3 @@ void tdc_fmc_exit(void)
destroy_workqueue(tdc_workqueue);
fmc_driver_unregister(&tdc_fmc_driver);
}
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