Add testcase 125 showing issue with architecture in separate file

If entity and architecture are in separate files, then the architecture isn't included in dependencies.

Add testcase 125 showing issue with architecture in separate file
If entity and architecture are in separate files, then the architecture isn't included in dependencies.
1f521501 · Benny Simonsen · b1c7ba85 · 1f521501 · 1f521501 · 1f521501
Commit 1f521501 authored Aug 25, 2023 by Benny Simonsen
5 changed files
--- a/testsuite/125arch_in_separate_file/Makefile.ref
+++ b/testsuite/125arch_in_separate_file/Makefile.ref
+########################################
+#  This file was generated by hdlmake  #
+#  http://ohwr.org/projects/hdl-make/  #
+########################################
+
+TOP_MODULE := gate4
+
+MODELSIM_INI_PATH := ../linux_fakebin/..
+
+VCOM_FLAGS := -quiet -modelsimini modelsim.ini 
+VSIM_FLAGS := 
+VLOG_FLAGS := -quiet -modelsimini modelsim.ini 
+VMAP_FLAGS := -modelsimini modelsim.ini 
+#target for performing local simulation
+local: sim_pre_cmd simulation sim_post_cmd
+
+VERILOG_SRC := 
+VERILOG_OBJ := 
+VHDL_SRC := ../files/gate.vhdl \
+../files/gate4_a.vhdl \
+../files/gate4_e.vhdl \
+
+VHDL_OBJ := work/hdlmake/gate_vhdl \
+work/hdlmake/gate4_a_vhdl \
+work/hdlmake/gate4_e_vhdl \
+
+INCLUDE_DIRS :=
+LIBS := work
+LIB_IND := work/hdlmake/work-stamp
+
+simulation: modelsim.ini $(LIB_IND) $(VERILOG_OBJ) $(VHDL_OBJ)
+$(VERILOG_OBJ): modelsim.ini
+$(VHDL_OBJ): $(LIB_IND) modelsim.ini
+
+modelsim.ini: $(MODELSIM_INI_PATH)/modelsim.ini
+		cp $< . 2>&1
+
+work/hdlmake/work-stamp:
+	(vlib work && vmap $(VMAP_FLAGS) work && mkdir -p work/hdlmake && touch work/hdlmake/work-stamp) || rm -rf work
+
+work/hdlmake/gate_vhdl: ../files/gate.vhdl
+		vcom $(VCOM_FLAGS) -work work $< 
+		@touch $@
+
+work/hdlmake/gate4_a_vhdl: ../files/gate4_a.vhdl \
+work/hdlmake/gate_vhdl \
+work/hdlmake/gate4_e_vhdl
+		vcom $(VCOM_FLAGS) -work work $< 
+		@touch $@
+
+work/hdlmake/gate4_e_vhdl: ../files/gate4_e.vhdl \
+work/hdlmake/gate4_a_vhdl
+		vcom $(VCOM_FLAGS) -work work $< 
+		@touch $@
+
+# USER SIM COMMANDS
+sim_pre_cmd:
+		
+sim_post_cmd:
+		
+
+CLEAN_TARGETS := $(LIBS) modelsim.ini transcript
+
+clean:
+		rm -rf $(CLEAN_TARGETS)
+mrproper: clean
+		rm -rf *.vcd *.wlf
+
+.PHONY: mrproper clean sim_pre_cmd sim_post_cmd simulation
--- a/testsuite/125arch_in_separate_file/Manifest.py
+++ b/testsuite/125arch_in_separate_file/Manifest.py
+action = "simulation"
+
+sim_tool="modelsim"
+
+top_module = "gate4"
+
+files = [ "../files/gate4_e.vhdl",  "../files/gate4_a.vhdl", "../files/gate.vhdl" ]
--- a/testsuite/files/gate4_a.vhdl
+++ b/testsuite/files/gate4_a.vhdl
+architecture behav of gate4 is
+begin
+  inst: entity work.gate
+    port map (i, o);
+end behav;
--- a/testsuite/files/gate4_e.vhdl
+++ b/testsuite/files/gate4_e.vhdl
+entity gate4 is
+  port (i : in bit;
+        o : out bit);
+end gate4;
--- a/testsuite/test_all.py
+++ b/testsuite/test_all.py
@@ -586,6 +586,9 @@ def test_explicit_dependency_lib_123():
 def test_explicit_required_lib_124():
    run_compare(path="124expl_req_lib")

+def test_arch_in_separate_file_125():
+    run_compare(path="125arch_in_separate_file")
+
 @pytest.mark.xfail
 def test_xfail():
    """This is a self-consistency test: the test is known to fail"""