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Commit 49d0aebd authored by Javier D. Garcia-Lasheras's avatar Javier D. Garcia-Lasheras
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Snapshot: refactoring synthesis Makefile generation

parent 46d8a6f1
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hdlmake/action/makefile.py
View file @ 49d0aebd
...@@ -24,10 +24,12 @@ ...@@ -24,10 +24,12 @@
"""Module providing the core functionality for writing Makefiles""" """Module providing the core functionality for writing Makefiles"""
import os import os
import sys
import string import string
import platform import platform
from .action import Action from .action import Action
from hdlmake.util import path as path_mod
class ActionMakefile(Action): class ActionMakefile(Action):
...@@ -47,16 +49,101 @@ class ActionMakefile(Action): ...@@ -47,16 +49,101 @@ class ActionMakefile(Action):
if self._file: if self._file:
self._file.close() self._file.close()
def _print_incl_makefiles(self, top_module):
"""Add the included makefiles that need to be previously loaded"""
for file_aux in top_module.incl_makefiles:
if os.path.exists(file_aux):
self.write("include %s\n" % file_aux)
def _print_sim_top(self, top_module): def _print_sim_top(self, top_module):
top_parameter = string.Template("""TOP_MODULE := ${top_module}\n top_parameter = string.Template("""\
PWD := $$(shell pwd)""") TOP_MODULE := ${top_module}
PWD := $$(shell pwd)
""")
self.writeln(top_parameter.substitute( self.writeln(top_parameter.substitute(
top_module=top_module.manifest_dict["sim_top"])) top_module=top_module.manifest_dict["sim_top"]))
def _print_syn_top(self, top_module): def _print_syn_top(self, top_module, tool_path, tcl_controls):
top_parameter = string.Template("""TOP_MODULE := ${top_module}\n """Create the top part of the synthesis Makefile"""
PWD := $$(shell pwd)""") if path_mod.check_windows():
tcl_interpreter = tcl_controls["windows_interpreter"]
else:
tcl_interpreter = tcl_controls["linux_interpreter"]
top_parameter = string.Template("""\
TOP_MODULE := ${top_module}
PWD := $$(shell pwd)
PROJECT := ${project_name}
TOOL_PATH := ${tool_path}
TCL_INTERPRETER := $$(TOOL_PATH)/${tcl_interpreter}
define TCL_OPEN
${tcl_open}
endef
export TCL_OPEN
define TCL_SAVE
${tcl_save}
endef
export TCL_SAVE
define TCL_CLOSE
${tcl_close}
endef
export TCL_CLOSE
define TCL_SYNTHESIZE
$$(TCL_OPEN)
${tcl_synthesize}
$$(TCL_SAVE)
$$(TCL_CLOSE)
endef
export TCL_SYNTHESIZE
define TCL_TRANSLATE
$$(TCL_OPEN)
${tcl_translate}
$$(TCL_SAVE)
$$(TCL_CLOSE)
endef
export TCL_SYNTHESIZE
define TCL_MAP
$$(TCL_OPEN)
${tcl_map}
$$(TCL_SAVE)
$$(TCL_CLOSE)
endef
export TCL_MAP
define TCL_PAR
$$(TCL_OPEN)
${tcl_par}
$$(TCL_SAVE)
$$(TCL_CLOSE)
endef
export TCL_PAR
define TCL_BITSTREAM
$$(TCL_OPEN)
${tcl_bitstream}
$$(TCL_SAVE)
$$(TCL_CLOSE)
endef
export TCL_BITSTREAM
""")
self.writeln(top_parameter.substitute( self.writeln(top_parameter.substitute(
project_name=top_module.manifest_dict["syn_project"],
tool_path=tool_path,
tcl_interpreter=tcl_interpreter,
tcl_open=tcl_controls["open"],
tcl_save=tcl_controls["save"],
tcl_close=tcl_controls["close"],
tcl_synthesize=tcl_controls["synthesize"],
tcl_translate=tcl_controls["translate"],
tcl_map=tcl_controls["map"],
tcl_par=tcl_controls["par"],
tcl_bitstream=tcl_controls["bitstream"],
top_module=top_module.manifest_dict["syn_top"])) top_module=top_module.manifest_dict["syn_top"]))
def _print_sim_options(self, top_module): def _print_sim_options(self, top_module):
...@@ -66,6 +153,60 @@ PWD := $$(shell pwd)""") ...@@ -66,6 +153,60 @@ PWD := $$(shell pwd)""")
self.writeln("#target for performing local simulation\n" self.writeln("#target for performing local simulation\n"
"local: sim_pre_cmd simulation sim_post_cmd\n") "local: sim_pre_cmd simulation sim_post_cmd\n")
def _print_syn_local(self):
self.writeln("#target for performing local synthesis\n"
"local: syn_pre_cmd synthesis syn_post_cmd\n")
def _print_syn_build(self):
"""Generate a Makefile to handle a synthesis project"""
self.writeln("""\
#target for performing local synthesis
synthesis: __gen_tcl_bitstream __run_tcl_bitstream
__gen_tcl_synthesize:
\t\techo "$$TCL_SYNTHESIZE" > run_synthesize.tcl
__gen_tcl_translate:
\t\techo "$$TCL_TRANSLATE)" > run_translate.tcl
__gen_tcl_map:
\t\techo "$$TCL_MAP" > run_map.tcl
__gen_tcl_par:
\t\techo "$$TCL_PAR" > run_par.tcl
__gen_tcl_bitstream:
\t\techo "$$TCL_BITSTREAM" > run_bitstream.tcl
__run_tcl_synthesize:
\t\t$(TCL_INTERPRETER)run_synthesize.tcl
__run_tcl_translate:
\t\t$(TCL_INTERPRETER)run_translate.tcl
__run_tcl_map:
\t\t$(TCL_INTERPRETER)run_map.tcl
__run_tcl_par:
\t\t$(TCL_INTERPRETER)run_par.tcl
__run_tcl_bitstream:
\t\t$(TCL_INTERPRETER)run_bitstream.tcl
synthesize: __syn_pre_synthesize_cmd __gen_tcl_synthesize __run_tcl_synthesize __syn_post_synthesize_cmd
translate: __syn_pre_translate_cmd __gen_tcl_translate __run_tcl_translate __syn_post_translate_cmd
map: __syn_pre_map_cmd __gen_tcl_map __run_tcl_map __syn_post_map_cmd
par: __syn_pre_par_cmd __gen_tcl_par __run_tcl_par __syn_post_par_cmd
bitstream: __syn_pre_bitstream_cmd __gen_tcl_bitstream __run_tcl_bitstream __syn_post_bitstream_cmd
""")
def _print_sim_sources(self, fileset): def _print_sim_sources(self, fileset):
from hdlmake.srcfile import VerilogFile, VHDLFile from hdlmake.srcfile import VerilogFile, VHDLFile
self.write("VERILOG_SRC := ") self.write("VERILOG_SRC := ")
...@@ -113,25 +254,65 @@ PWD := $$(shell pwd)""") ...@@ -113,25 +254,65 @@ PWD := $$(shell pwd)""")
self.write('\n') self.write('\n')
def _print_syn_command(self, top_module): def _print_syn_command(self, top_module):
if top_module.manifest_dict["syn_pre_cmd"]: """Create the Makefile targets for user defined commands"""
syn_pre_cmd = top_module.manifest_dict["syn_pre_cmd"] syn_command = string.Template("""\
else: # User defined commands
syn_pre_cmd = ''
if top_module.manifest_dict["syn_post_cmd"]:
syn_post_cmd = top_module.manifest_dict["syn_post_cmd"]
else:
syn_post_cmd = ''
syn_command = string.Template("""# USER SYN COMMANDS
syn_pre_cmd: syn_pre_cmd:
\t\t${syn_pre_cmd} \t\t${syn_pre_cmd}
syn_post_cmd: syn_post_cmd:
\t\t${syn_post_cmd} \t\t${syn_post_cmd}
""")
self.writeln(syn_command.substitute(syn_pre_cmd=syn_pre_cmd, __syn_pre_synthesize_cmd:
syn_post_cmd=syn_post_cmd)) \t\t${syn_pre_synthesize_cmd}
__syn_post_synthesize_cmd:
\t\t${syn_post_synthesize_cmd}
__syn_pre_translate_cmd:
\t\t${syn_pre_translate_cmd}
__syn_post_translate_cmd:
\t\t${syn_post_translate_cmd}
__syn_pre_map_cmd:
\t\t${syn_pre_map_cmd}
__syn_post_map_cmd:
\t\t${syn_post_map_cmd}
__syn_pre_par_cmd:
\t\t${syn_pre_par_cmd}
__syn_post_par_cmd:
\t\t${syn_post_par_cmd}
__syn_pre_bitstream_cmd:
\t\t${syn_pre_bitstream_cmd}
__syn_post_bitstream_cmd:
\t\t${syn_post_bitstream_cmd}
""")
self.writeln(syn_command.substitute(
syn_pre_cmd=top_module.manifest_dict[
"syn_pre_cmd"],
syn_post_cmd=top_module.manifest_dict[
"syn_post_cmd"],
syn_pre_synthesize_cmd=top_module.manifest_dict[
"syn_pre_synthesize_cmd"],
syn_post_synthesize_cmd=top_module.manifest_dict[
"syn_post_synthesize_cmd"],
syn_pre_translate_cmd=top_module.manifest_dict[
"syn_pre_translate_cmd"],
syn_post_translate_cmd=top_module.manifest_dict[
"syn_post_translate_cmd"],
syn_pre_map_cmd=top_module.manifest_dict[
"syn_pre_map_cmd"],
syn_post_map_cmd=top_module.manifest_dict[
"syn_post_map_cmd"],
syn_pre_par_cmd=top_module.manifest_dict[
"syn_pre_par_cmd"],
syn_post_par_cmd=top_module.manifest_dict[
"syn_post_par_cmd"],
syn_pre_bitstream_cmd=top_module.manifest_dict[
"syn_pre_bitstream_cmd"],
syn_post_bitstream_cmd=top_module.manifest_dict[
"syn_post_bitstream_cmd"]))
def _print_sim_command(self, top_module): def _print_sim_command(self, top_module):
if top_module.manifest_dict["sim_pre_cmd"]: if top_module.manifest_dict["sim_pre_cmd"]:
...@@ -178,6 +359,11 @@ sim_post_cmd: ...@@ -178,6 +359,11 @@ sim_post_cmd:
self.writeln( self.writeln(
".PHONY: mrproper clean sim_pre_cmd sim_post_cmd simulation") ".PHONY: mrproper clean sim_pre_cmd sim_post_cmd simulation")
def _print_syn_phony(self):
"""Print synthesis PHONY target list to the Makefile"""
self.writeln(
".PHONY: mrproper clean syn_pre_cmd syn_post_cmd synthesis")
def initialize(self): def initialize(self):
"""Open the Makefile file and print a header if not initialized""" """Open the Makefile file and print a header if not initialized"""
if not self._initialized: if not self._initialized:
......
hdlmake/action/synthesis.py
View file @ 49d0aebd
...@@ -82,6 +82,7 @@ class ActionSynthesis( ...@@ -82,6 +82,7 @@ class ActionSynthesis(
tool_info = tool_object.TOOL_INFO tool_info = tool_object.TOOL_INFO
path_key = tool_info['id'] + '_path' path_key = tool_info['id'] + '_path'
name = tool_info['name'] name = tool_info['name']
top_module = self.get_top_module()
env = self.env env = self.env
env.check_general() env.check_general()
...@@ -92,10 +93,19 @@ class ActionSynthesis( ...@@ -92,10 +93,19 @@ class ActionSynthesis(
else: else:
tool_path = "" tool_path = ""
tool_ctrl = tool_object.TCL_CONTROLS
logging.info("Generating synthesis makefile for " + name) logging.info("Generating synthesis makefile for " + name)
tool_object.generate_synthesis_makefile( tool_object._print_incl_makefiles(top_module)
top_mod=self.get_top_module(), tool_object._print_syn_top(top_module, tool_path, tool_ctrl)
tool_path=tool_path) tool_object._print_syn_local()
tool_object._print_syn_command(top_module)
tool_object._print_syn_build()
tool_object._print_clean(tool_object.CLEAN_TARGETS)
tool_object._print_syn_phony()
# tool_object.generate_synthesis_makefile(
# top_mod=top_module,
# tool_path=tool_path)
logging.info("Synthesis makefile generated.") logging.info("Synthesis makefile generated.")
def _write_project_vhd(self, tool, version): def _write_project_vhd(self, tool, version):
......
hdlmake/tools/diamond.py
View file @ 49d0aebd
...@@ -47,6 +47,22 @@ class ToolDiamond(ActionMakefile): ...@@ -47,6 +47,22 @@ class ToolDiamond(ActionMakefile):
SUPPORTED_FILES = [EDFFile, LPFFile] SUPPORTED_FILES = [EDFFile, LPFFile]
CLEAN_TARGETS = {'clean': ["*.sty", "$(PROJECT)", "run.tcl"],
'mrproper': ["*.jed"]}
TCL_CONTROLS = {'windows_interpreter': 'pnmainc ',
'linux_interpreter': 'diamondc ',
'open': 'prj_project open $(PROJECT).ldf',
'save': 'prj_project save',
'close': 'prj_project close',
'synthesize': '',
'translate': '',
'map': '',
'par': 'prj_run PAR -impl $(PROJECT)',
'bitstream':
'prj_run Export -impl $(PROJECT) -task Bitgen',
'install_source': '$(PROJECT)/$(PROJECT)_$(PROJECT).jed'}
def __init__(self): def __init__(self):
super(ToolDiamond, self).__init__() super(ToolDiamond, self).__init__()
self.files = [] self.files = []
...@@ -58,69 +74,6 @@ class ToolDiamond(ActionMakefile): ...@@ -58,69 +74,6 @@ class ToolDiamond(ActionMakefile):
"""Get version from the Lattice Diamond program""" """Get version from the Lattice Diamond program"""
return 'unknown' return 'unknown'
def generate_synthesis_makefile(self, top_mod, tool_path):
"""Generate a synthesis Makefile for a Lattice Diamond project"""
makefile_tmplt = string.Template("""PROJECT := ${project_name}
DIAMOND_CRAP := \
$$(PROJECT)1.sty \
run.tcl
#target for performing local synthesis
local: syn_pre_cmd synthesis syn_post_cmd
synthesis:
\t\techo "prj_project open \"$$(PROJECT).ldf\"" > run.tcl
\t\techo "prj_run PAR -impl $$(PROJECT)" >> run.tcl
\t\techo "prj_run Export -impl $$(PROJECT) -task Bitgen" >> run.tcl
\t\techo "prj_project close" >> run.tcl
\t\t${diamondc_path} run.tcl
\t\tcp $$(PROJECT)/$$(PROJECT)_$$(PROJECT).jed $$(PROJECT).jed
syn_post_cmd:
\t\t${syn_post_cmd}
syn_pre_cmd:
\t\t${syn_pre_cmd}
#target for cleaing all intermediate stuff
clean:
\t\trm -f $$(DIAMOND_CRAP)
\t\trm -rf $$(PROJECT)
#target for cleaning final files
mrproper:
\t\trm -f *.jed
.PHONY: mrproper clean syn_pre_cmd syn_post_cmd synthesis local
""")
if top_mod.manifest_dict["syn_pre_cmd"]:
syn_pre_cmd = top_mod.manifest_dict["syn_pre_cmd"]
else:
syn_pre_cmd = ''
if top_mod.manifest_dict["syn_post_cmd"]:
syn_post_cmd = top_mod.manifest_dict["syn_post_cmd"]
else:
syn_post_cmd = ''
if sys.platform == 'cygwin':
bin_name = 'pnmainc'
else:
bin_name = 'diamondc'
makefile_text = makefile_tmplt.substitute(
syn_top=top_mod.manifest_dict["syn_top"],
project_name=top_mod.manifest_dict[
"syn_project"],
diamond_path=tool_path,
syn_pre_cmd=syn_pre_cmd,
syn_post_cmd=syn_post_cmd,
diamondc_path=os.path.join(tool_path, bin_name))
self.write(makefile_text)
for file_aux in top_mod.incl_makefiles:
if os.path.exists(file_aux):
self.write("include %s\n" % file_aux)
def generate_synthesis_project(self, update=False, tool_version='', def generate_synthesis_project(self, update=False, tool_version='',
top_mod=None, fileset=None): top_mod=None, fileset=None):
"""Create project for Lattice Diamond synthesis""" """Create project for Lattice Diamond synthesis"""
......
hdlmake/tools/ise.py
View file @ 49d0aebd
...@@ -70,6 +70,37 @@ class ToolISE(ActionMakefile): ...@@ -70,6 +70,37 @@ class ToolISE(ActionMakefile):
SUPPORTED_FILES = [UCFFile, CDCFile, NGCFile] SUPPORTED_FILES = [UCFFile, CDCFile, NGCFile]
CLEAN_TARGETS = {'clean': ["xst xlnx_auto_*_xdb", "iseconfig _xmsgs",
"_ngo", "*.b", "*_summary.html", "*.tcl",
"*.bld", "*.cmd_log", "*.drc", "*.lso", "*.ncd",
"*.ngc", "*.ngd", "*.ngr", "*.pad", "*.par",
"*.pcf", "*.prj", "*.ptwx", "*.stx", "*.syr",
"*.twr", "*.twx", "*.gise", "*.gise", "*.bgn",
"*.unroutes", "*.ut", "*.xpi", "*.xst",
"*.xwbt", "*_envsettings.html", "*_guide.ncd",
"*_map.map", "*_map.mrp", "*_map.ncd",
"*_map.ngm", "*_map.xrpt", "*_ngdbuild.xrpt",
"*_pad.csv", "*_pad.txt", "*_par.xrpt",
"*_summary.xml", "*_usage.xml", "*_xst.xrpt",
"usage_statistics_webtalk.html", "webtalk.log",
"par_usage_statistics.html", "webtalk_pn.xml",
"run_synthesize.tcl", "run_translate.tcl",
"run_map.tcl", "run_par.tcl",
"run_bitstream.tcl"],
'mrproper': ["*.bit", "*.bin", "*.mcs"]}
TCL_CONTROLS = {'windows_interpreter': 'xtclsh ',
'linux_interpreter': 'xtclsh ',
'open': 'project open $(PROJECT)',
'save': 'project save',
'close': 'project close',
'synthesize': 'process run {Synthesize - XST}',
'translate': 'process run {Translate}',
'map': 'process run {Map}',
'par': 'process run {Place & Route}',
'bitstream': 'process run {Generate Programming File}',
'install_source': '*.bit *.bin'}
def __init__(self): def __init__(self):
super(ToolISE, self).__init__() super(ToolISE, self).__init__()
self.props = {} self.props = {}
...@@ -116,192 +147,6 @@ class ToolISE(ActionMakefile): ...@@ -116,192 +147,6 @@ class ToolISE(ActionMakefile):
return None return None
return ise_version return ise_version
def generate_synthesis_makefile(self, top_mod, tool_path):
"""Generate a Makefile to handle a synthesis Xilinx ISE project"""
makefile_tmplt = string.Template("""PROJECT := ${project_name}
ISE_CRAP := \
*.b \
${syn_top}_summary.html \
*.tcl \
${syn_top}.bld \
${syn_top}.cmd_log \
*.drc \
${syn_top}.lso \
*.ncd \
${syn_top}.ngc \
${syn_top}.ngd \
${syn_top}.ngr \
${syn_top}.pad \
${syn_top}.par \
${syn_top}.pcf \
${syn_top}.prj \
${syn_top}.ptwx \
${syn_top}.stx \
${syn_top}.syr \
${syn_top}.twr \
${syn_top}.twx \
${syn_top}.gise \
$$(PROJECT).gise \
${syn_top}.bgn \
${syn_top}.unroutes \
${syn_top}.ut \
${syn_top}.xpi \
${syn_top}.xst \
${syn_top}_bitgen.xwbt \
${syn_top}_envsettings.html \
${syn_top}_guide.ncd \
${syn_top}_map.map \
${syn_top}_map.mrp \
${syn_top}_map.ncd \
${syn_top}_map.ngm \
${syn_top}_map.xrpt \
${syn_top}_ngdbuild.xrpt \
${syn_top}_pad.csv \
${syn_top}_pad.txt \
${syn_top}_par.xrpt \
${syn_top}_summary.xml \
${syn_top}_usage.xml \
${syn_top}_xst.xrpt \
usage_statistics_webtalk.html \
par_usage_statistics.html \
webtalk.log \
webtalk_pn.xml \
run_synthesize.tcl \
run_translate.tcl \
run_map.tcl \
run_par.tcl \
run_bitstream.tcl
#target for performing local synthesis
local: __syn_pre_cmd __gen_tcl_bitstream __run_tcl_bitstream __syn_post_cmd
__gen_tcl_synthesize:
\t\techo project open $$(PROJECT) > run_synthesize.tcl
\t\techo process run {Synthesize - XST} >> run_synthesize.tcl
__gen_tcl_translate:
\t\techo project open $$(PROJECT) > run_translate.tcl
\t\techo process run {Translate} >> run_translate.tcl
__gen_tcl_map:
\t\techo project open $$(PROJECT) > run_map.tcl
\t\techo process run {Map} >> run_map.tcl
__gen_tcl_par:
\t\techo project open $$(PROJECT) > run_par.tcl
\t\techo process run {Place & Route} >> run_par.tcl
__gen_tcl_bitstream:
\t\techo project open $$(PROJECT) > run_bitstream.tcl
\t\techo process run {Generate Programming File} >> run_bitstream.tcl
__run_tcl_synthesize:
\t\t${xtclsh_path} run_synthesize.tcl
__run_tcl_translate:
\t\t${xtclsh_path} run_translate.tcl
__run_tcl_map:
\t\t${xtclsh_path} run_map.tcl
__run_tcl_par:
\t\t${xtclsh_path} run_par.tcl
__run_tcl_bitstream:
\t\t${xtclsh_path} run_bitstream.tcl
__syn_pre_cmd:
\t\t${syn_pre_cmd}
__syn_pre_synthesize_cmd:
\t\t${syn_pre_synthesize_cmd}
__syn_post_synthesize_cmd:
\t\t${syn_post_synthesize_cmd}
__syn_pre_translate_cmd:
\t\t${syn_pre_translate_cmd}
__syn_post_translate_cmd:
\t\t${syn_post_translate_cmd}
__syn_pre_map_cmd:
\t\t${syn_pre_map_cmd}
__syn_post_map_cmd:
\t\t${syn_post_map_cmd}
__syn_pre_par_cmd:
\t\t${syn_pre_par_cmd}
__syn_post_par_cmd:
\t\t${syn_post_par_cmd}
__syn_pre_bitstream_cmd:
\t\t${syn_pre_bitstream_cmd}
__syn_post_bitstream_cmd:
\t\t${syn_post_bitstream_cmd}
__syn_post_cmd:
\t\t${syn_post_cmd}
synthesize: __syn_pre_synthesize_cmd __gen_tcl_synthesize __run_tcl_synthesize __syn_post_synthesize_cmd
translate: __syn_pre_translate_cmd __gen_tcl_translate __run_tcl_translate __syn_post_translate_cmd
map: __syn_pre_map_cmd __gen_tcl_map __run_tcl_map __syn_post_map_cmd
par: __syn_pre_par_cmd __gen_tcl_par __run_tcl_par __syn_post_par_cmd
bitstream: __syn_pre_bitstream_cmd __gen_tcl_bitstream __run_tcl_bitstream __syn_post_bitstream_cmd
#target for cleaning all intermediate stuff
clean:
\t\trm -f $$(ISE_CRAP)
\t\trm -rf xst xlnx_auto_*_xdb iseconfig _xmsgs _ngo
#target for cleaning final files
mrproper:
\t\trm -f *.bit *.bin *.mcs
.PHONY: mrproper clean local
""")
makefile_text = makefile_tmplt.substitute(
syn_top=top_mod.manifest_dict["syn_top"],
project_name=top_mod.manifest_dict[
"syn_project"],
ise_path=tool_path,
syn_pre_cmd=top_mod.manifest_dict[
"syn_pre_cmd"],
syn_post_cmd=top_mod.manifest_dict[
"syn_post_cmd"],
syn_pre_synthesize_cmd=top_mod.manifest_dict[
"syn_pre_synthesize_cmd"],
syn_post_synthesize_cmd=top_mod.manifest_dict[
"syn_post_synthesize_cmd"],
syn_pre_translate_cmd=top_mod.manifest_dict[
"syn_pre_translate_cmd"],
syn_post_translate_cmd=top_mod.manifest_dict[
"syn_post_translate_cmd"],
syn_pre_map_cmd=top_mod.manifest_dict[
"syn_pre_map_cmd"],
syn_post_map_cmd=top_mod.manifest_dict[
"syn_post_map_cmd"],
syn_pre_par_cmd=top_mod.manifest_dict[
"syn_pre_par_cmd"],
syn_post_par_cmd=top_mod.manifest_dict[
"syn_post_par_cmd"],
syn_pre_bitstream_cmd=top_mod.manifest_dict[
"syn_pre_bitstream_cmd"],
syn_post_bitstream_cmd=top_mod.manifest_dict[
"syn_post_bitstream_cmd"],
xtclsh_path=os.path.join(tool_path, "xtclsh"))
self.write(makefile_text)
for file_aux in top_mod.incl_makefiles:
if os.path.exists(file_aux):
self.write("include %s\n" % file_aux)
class StringBuffer(list): class StringBuffer(list):
"""Auxiliar class providing a convenient string storage""" """Auxiliar class providing a convenient string storage"""
...@@ -381,17 +226,17 @@ mrproper: ...@@ -381,17 +226,17 @@ mrproper:
def _set_values_from_manifest(self): def _set_values_from_manifest(self):
"""Add the synthesis properties from the Manifest to the project""" """Add the synthesis properties from the Manifest to the project"""
top_module = self.top_mod top_module = self.top_mod
if top_module.manifest_dict["syn_family"] is None: syn_family = top_module.manifest_dict["syn_family"]
top_module.manifest_dict["syn_family"] = FAMILY_NAMES.get( if syn_family is None:
syn_family = FAMILY_NAMES.get(
top_module.manifest_dict["syn_device"][0:4].upper()) top_module.manifest_dict["syn_device"][0:4].upper())
if top_module.manifest_dict["syn_family"] is None: if syn_family is None:
logging.error( logging.error(
"syn_family is not definied in Manifest.py" "syn_family is not definied in Manifest.py"
" and can not be guessed!") " and can not be guessed!")
quit(-1) quit(-1)
self.add_property("Device", top_module.manifest_dict["syn_device"]) self.add_property("Device", top_module.manifest_dict["syn_device"])
self.add_property("Device Family", self.add_property("Device Family", syn_family)
top_module.manifest_dict["syn_family"])
self.add_property("Speed Grade", top_module.manifest_dict["syn_grade"]) self.add_property("Speed Grade", top_module.manifest_dict["syn_grade"])
self.add_property("Package", top_module.manifest_dict["syn_package"]) self.add_property("Package", top_module.manifest_dict["syn_package"])
self.add_property( self.add_property(
......
hdlmake/tools/libero.py
View file @ 49d0aebd
...@@ -48,6 +48,22 @@ class ToolLibero(ActionMakefile): ...@@ -48,6 +48,22 @@ class ToolLibero(ActionMakefile):
SUPPORTED_FILES = [SDCFile, PDCFile] SUPPORTED_FILES = [SDCFile, PDCFile]
CLEAN_TARGETS = {'clean': ["$(PROJECT)", "run.tcl"],
'mrproper': ["*.pdb", "*.stp"]}
TCL_CONTROLS = {'windows_interpreter': 'libero SCRIPT:',
'linux_interpreter': 'libero SCRIPT:',
'open': 'open_project -file {$(PROJECT)/$(PROJECT).prjx}',
'save': 'save_project',
'close': 'close_project',
'synthesize': '',
'translate': '',
'map': '',
'par': '',
'bitstream':
'update_and_run_tool -name {GENERATEPROGRAMMINGDATA}',
'install_source': '$(PROJECT)/designer/impl1/$(SYN_TOP).pdb'}
def __init__(self): def __init__(self):
super(ToolLibero, self).__init__() super(ToolLibero, self).__init__()
self.files = [] self.files = []
...@@ -63,65 +79,6 @@ class ToolLibero(ActionMakefile): ...@@ -63,65 +79,6 @@ class ToolLibero(ActionMakefile):
"""Get version for Microsemi Libero IDE synthesis""" """Get version for Microsemi Libero IDE synthesis"""
return 'unknown' return 'unknown'
def generate_synthesis_makefile(self, top_mod, tool_path):
"""Generate the synthesis Makefile for Microsemi Libero IDE"""
makefile_tmplt = string.Template("""PROJECT := ${project_name}
LIBERO_CRAP := \
run.tcl
#target for performing local synthesis
local: syn_pre_cmd synthesis syn_post_cmd
synthesis:
\t\techo "open_project -file {$$(PROJECT)/$$(PROJECT).prjx}" > run.tcl
\t\techo "update_and_run_tool -name {GENERATEPROGRAMMINGDATA}" >> run.tcl
\t\techo "save_project" >> run.tcl
\t\techo "close_project" >> run.tcl
\t\t${libero_sh_path} SCRIPT:run.tcl
\t\tcp $$(PROJECT)/designer/impl1/${syn_top}.pdb ${syn_top}.pdb
syn_post_cmd:
\t\t${syn_post_cmd}
syn_pre_cmd:
\t\t${syn_pre_cmd}
#target for cleaning all intermediate stuff
clean:
\t\trm -f $$(LIBERO_CRAP)
\t\trm -rf $$(PROJECT)
#target for cleaning final files
mrproper:
\t\trm -f *.pdb *.stp
.PHONY: mrproper clean syn_pre_cmd syn_post_cmd synthesis local
""")
if top_mod.manifest_dict["syn_pre_cmd"]:
syn_pre_cmd = top_mod.manifest_dict["syn_pre_cmd"]
else:
syn_pre_cmd = ''
if top_mod.manifest_dict["syn_post_cmd"]:
syn_post_cmd = top_mod.manifest_dict["syn_post_cmd"]
else:
syn_post_cmd = ''
makefile_text = makefile_tmplt.substitute(
syn_top=top_mod.manifest_dict["syn_top"],
project_name=top_mod.manifest_dict[
"syn_project"],
libero_path=tool_path,
syn_pre_cmd=syn_pre_cmd,
syn_post_cmd=syn_post_cmd,
libero_sh_path=os.path.join(tool_path, "libero"))
self.write(makefile_text)
for file_aux in top_mod.incl_makefiles:
if os.path.exists(file_aux):
self.write("include %s\n" % file_aux)
def generate_synthesis_project( def generate_synthesis_project(
self, update=False, tool_version='', top_mod=None, fileset=None): self, update=False, tool_version='', top_mod=None, fileset=None):
"""Create a Microsemi Libero IDE synthesis project""" """Create a Microsemi Libero IDE synthesis project"""
......
hdlmake/tools/planahead.py
View file @ 49d0aebd
...@@ -50,6 +50,28 @@ class ToolPlanAhead(ActionMakefile): ...@@ -50,6 +50,28 @@ class ToolPlanAhead(ActionMakefile):
SUPPORTED_FILES = [UCFFile, NGCFile, XMPFile, XCOFile] SUPPORTED_FILES = [UCFFile, NGCFile, XMPFile, XCOFile]
CLEAN_TARGETS = {'clean': ["planAhead_*", "planAhead.*", "run.tcl",
".Xil", "$(PROJECT).cache", "$(PROJECT).data",
" $(PROJECT).runs", "$(PROJECT).ppr"],
'mrproper': ["*.bit", "*.bin"]}
TCL_CONTROLS = {'windows_interpreter': 'planAhead -mode tcl -source ',
'linux_interpreter': 'planAhead -mode tcl -source ',
'open': 'open_project $(PROJECT).ppr',
'save': '',
'close': 'exit',
'synthesize': 'reset_run synth_1\n'
'launch_runs synth_1\n'
'wait_on_run synth_1',
'translate': '',
'map': '',
'par': 'reset_run impl_1\n'
'launch_runs impl_1\n'
'wait_on_run impl_1',
'bitstream': 'launch_runs impl_1 -to_step Bitgen\n'
'wait_on_run impl_1',
'install_source': '$(PROJECT).runs/impl_1/$(SYN_TOP).bit'}
def __init__(self): def __init__(self):
super(ToolPlanAhead, self).__init__() super(ToolPlanAhead, self).__init__()
self.properties = [] self.properties = []
...@@ -62,73 +84,6 @@ class ToolPlanAhead(ActionMakefile): ...@@ -62,73 +84,6 @@ class ToolPlanAhead(ActionMakefile):
"""Get the Xilinx PlanAhead program version""" """Get the Xilinx PlanAhead program version"""
return 'unknown' return 'unknown'
def generate_synthesis_makefile(self, top_mod, tool_path):
"""Generate a synthesis Makefile for Xilinx PlanAhead"""
makefile_tmplt = string.Template("""PROJECT := ${project_name}
PLANAHEAD_CRAP := \
planAhead_* \
planAhead.* \
run.tcl
#target for performing local synthesis
local: syn_pre_cmd synthesis syn_post_cmd
synthesis:
\t\techo "open_project $$(PROJECT).ppr" > run.tcl
\t\techo "reset_run synth_1" >> run.tcl
\t\techo "reset_run impl_1" >> run.tcl
\t\techo "launch_runs synth_1" >> run.tcl
\t\techo "wait_on_run synth_1" >> run.tcl
\t\techo "launch_runs impl_1" >> run.tcl
\t\techo "wait_on_run impl_1" >> run.tcl
\t\techo "launch_runs impl_1 -to_step Bitgen" >> run.tcl
\t\techo "wait_on_run impl_1" >> run.tcl
\t\techo "exit" >> run.tcl
\t\t${planahead_sh_path} -mode tcl -source run.tcl
\t\tcp $$(PROJECT).runs/impl_1/${syn_top}.bit ${syn_top}.bit
syn_post_cmd:
\t\t${syn_post_cmd}
syn_pre_cmd:
\t\t${syn_pre_cmd}
#target for cleaning all intermediate stuff
clean:
\t\trm -f $$(PLANAHEAD_CRAP)
\t\trm -rf .Xil $$(PROJECT).cache $$(PROJECT).data $$(PROJECT).runs $$(PROJECT).ppr
#target for cleaning final files
mrproper:
\t\trm -f *.bit
.PHONY: mrproper clean syn_pre_cmd syn_post_cmd synthesis local
""")
if top_mod.manifest_dict["syn_pre_cmd"]:
syn_pre_cmd = top_mod.manifest_dict["syn_pre_cmd"]
else:
syn_pre_cmd = ''
if top_mod.manifest_dict["syn_post_cmd"]:
syn_post_cmd = top_mod.manifest_dict["syn_post_cmd"]
else:
syn_post_cmd = ''
makefile_text = makefile_tmplt.substitute(
syn_top=top_mod.manifest_dict["syn_top"],
project_name=top_mod.manifest_dict[
"syn_project"],
planahead_path=tool_path,
syn_pre_cmd=syn_pre_cmd,
syn_post_cmd=syn_post_cmd,
planahead_sh_path=os.path.join(tool_path, "planAhead"))
self.write(makefile_text)
for file_aux in top_mod.incl_makefiles:
if os.path.exists(file_aux):
self.write("include %s\n" % file_aux)
def generate_synthesis_project( def generate_synthesis_project(
self, update=False, tool_version='', top_mod=None, fileset=None): self, update=False, tool_version='', top_mod=None, fileset=None):
"""Create a Xilinx PlanAhead project""" """Create a Xilinx PlanAhead project"""
...@@ -146,7 +101,6 @@ mrproper: ...@@ -146,7 +101,6 @@ mrproper:
self.add_files(fileset) self.add_files(fileset)
self.emit() self.emit()
self.execute() self.execute()
logging.info("PlanAhead project file generated.") logging.info("PlanAhead project file generated.")
def emit(self): def emit(self):
......
hdlmake/tools/quartus.py
View file @ 49d0aebd
...@@ -52,6 +52,25 @@ class ToolQuartus(ActionMakefile): ...@@ -52,6 +52,25 @@ class ToolQuartus(ActionMakefile):
SUPPORTED_FILES = [SignalTapFile, SDCFile, QIPFile, QSYSFile, DPFFile, SUPPORTED_FILES = [SignalTapFile, SDCFile, QIPFile, QSYSFile, DPFFile,
QSFFile, BSFFile, BDFFile, TDFFile, GDFFile] QSFFile, BSFFile, BDFFile, TDFFile, GDFFile]
CLEAN_TARGETS = {'clean': ["*.rpt", "*.smsg", "run.tcl", "*.summary",
"*.done", "*.jdi", "*.pin", "*.qws",
"db", "incremental_db"],
'mrproper': ["*.sof", "*.pof", "*.jam", "*.jbc",
"*.ekp *.jic"]}
TCL_CONTROLS = {'windows_interpreter': 'quartus -t ',
'linux_interpreter': 'quartus -t ',
'open': 'load_package flow\\n'
'project_open $(PROJECT)',
'save': '',
'close': '',
'synthesize': '',
'translate': '',
'map': '',
'par': '',
'bitstream': 'execute_flow -compile',
'install_source': ''}
def __init__(self): def __init__(self):
self._preflow = None self._preflow = None
self._postmodule = None self._postmodule = None
...@@ -65,76 +84,6 @@ class ToolQuartus(ActionMakefile): ...@@ -65,76 +84,6 @@ class ToolQuartus(ActionMakefile):
"""Get Altera Quartus version from the binary program""" """Get Altera Quartus version from the binary program"""
return 'unknown' return 'unknown'
def generate_synthesis_makefile(self, top_mod, tool_path):
"""Generate the synthesis Makefile for Altera Quartus"""
makefile_tmplt = string.Template("""PROJECT := ${project_name}
QUARTUS_CRAP := \
$$(PROJECT).asm.rpt \
$$(PROJECT).done \
$$(PROJECT).fit.rpt \
$$(PROJECT).fit.smsg \
$$(PROJECT).fit.summary \
$$(PROJECT).flow.rpt \
$$(PROJECT).jdi \
$$(PROJECT).map.rpt \
$$(PROJECT).map.summary \
$$(PROJECT).pin \
$$(PROJECT).qws \
$$(PROJECT).sta.rpt \
$$(PROJECT).sta.summary \
run.tcl
#target for performing local synthesis
local: syn_pre_cmd synthesis syn_post_cmd
synthesis:
\t\techo "load_package flow" > run.tcl
\t\techo "project_open $$(PROJECT)" >> run.tcl
\t\techo "execute_flow -compile" >> run.tcl
\t\t${quartus_sh_path} -t run.tcl
syn_post_cmd:
\t\t${syn_post_cmd}
syn_pre_cmd:
\t\t${syn_pre_cmd}
#target for cleaing all intermediate stuff
clean:
\t\trm -f $$(QUARTUS_CRAP)
\t\trm -rf db incremental_db
#target for cleaning final files
mrproper:
\t\trm -f *.sof *.pof *.jam *.jbc *.ekp *.jic
.PHONY: mrproper clean syn_pre_cmd syn_post_cmd synthesis local
""")
if top_mod.manifest_dict["syn_pre_cmd"]:
syn_pre_cmd = top_mod.manifest_dict["syn_pre_cmd"]
else:
syn_pre_cmd = ''
if top_mod.manifest_dict["syn_post_cmd"]:
syn_post_cmd = top_mod.manifest_dict["syn_post_cmd"]
else:
syn_post_cmd = ''
makefile_text = makefile_tmplt.substitute(
syn_top=top_mod.manifest_dict["syn_top"],
project_name=top_mod.manifest_dict[
"syn_project"],
quartus_path=tool_path,
syn_pre_cmd=syn_pre_cmd,
syn_post_cmd=syn_post_cmd,
quartus_sh_path=os.path.join(tool_path, "quartus_sh"))
self.write(makefile_text)
for file_aux in top_mod.incl_makefiles:
if os.path.exists(file_aux):
self.write("include %s\n" % file_aux)
def _set_tcl_files(self, mod): def _set_tcl_files(self, mod):
"""Method that checks if the TCL files declared by the module """Method that checks if the TCL files declared by the module
manifest dictionary exists and if so create them and manifest dictionary exists and if so create them and
...@@ -147,7 +96,6 @@ mrproper: ...@@ -147,7 +96,6 @@ mrproper:
" doesn't exist: " + path + ".\nExiting.") " doesn't exist: " + path + ".\nExiting.")
quit() quit()
self._preflow = path self._preflow = path
if mod.manifest_dict["quartus_postmodule"] is not None: if mod.manifest_dict["quartus_postmodule"] is not None:
path = path_mod.compose( path = path_mod.compose(
mod.manifest_dict["quartus_postmodule"], mod.path) mod.manifest_dict["quartus_postmodule"], mod.path)
...@@ -156,7 +104,6 @@ mrproper: ...@@ -156,7 +104,6 @@ mrproper:
" doesn't exist: " + path + ".\nExiting.") " doesn't exist: " + path + ".\nExiting.")
quit() quit()
self._postmodule = path self._postmodule = path
if mod.manifest_dict["quartus_postflow"] is not None: if mod.manifest_dict["quartus_postflow"] is not None:
path = path_mod.compose( path = path_mod.compose(
mod.manifest_dict["quartus_postflow"], mod.path) mod.manifest_dict["quartus_postflow"], mod.path)
...@@ -332,13 +279,11 @@ mrproper: ...@@ -332,13 +279,11 @@ mrproper:
"^EP4CGX.*$": "Cyclone IV GX", "^EP4CGX.*$": "Cyclone IV GX",
"^5S.*$": "Stratix V", "^5S.*$": "Stratix V",
} }
syn_device = top_mod.manifest_dict["syn_device"]
syn_device = top_mod.manifest_dict["syn_device"], syn_family = top_mod.manifest_dict["syn_family"]
syn_family = top_mod.manifest_dict["syn_family"], syn_grade = top_mod.manifest_dict["syn_grade"]
syn_grade = top_mod.manifest_dict["syn_grade"], syn_package = top_mod.manifest_dict["syn_package"]
syn_package = top_mod.manifest_dict["syn_package"],
syn_top = top_mod.manifest_dict["syn_top"] syn_top = top_mod.manifest_dict["syn_top"]
if syn_family is None: if syn_family is None:
for key in family_names: for key in family_names:
if re.match(key, syn_device.upper()): if re.match(key, syn_device.upper()):
...@@ -346,12 +291,10 @@ mrproper: ...@@ -346,12 +291,10 @@ mrproper:
logging.debug( logging.debug(
"Auto-guessed syn_family to be %s (%s => %s)", "Auto-guessed syn_family to be %s (%s => %s)",
syn_family, syn_device, key) syn_family, syn_device, key)
if syn_family is None: if syn_family is None:
logging.error("Could not auto-guess device family, please " logging.error("Could not auto-guess device family, please "
"specify in Manifest.py using syn_family!") "specify in Manifest.py using syn_family!")
sys.exit("\nExiting") sys.exit("\nExiting")
devstring = (syn_device + syn_package + syn_grade).upper() devstring = (syn_device + syn_package + syn_grade).upper()
q_prop = _QuartusProjectProperty q_prop = _QuartusProjectProperty
self.add_property( self.add_property(
......
hdlmake/tools/vivado.py
View file @ 49d0aebd
...@@ -52,6 +52,29 @@ class ToolVivado(ActionMakefile): ...@@ -52,6 +52,29 @@ class ToolVivado(ActionMakefile):
SUPPORTED_FILES = [UCFFile, NGCFile, XMPFile, SUPPORTED_FILES = [UCFFile, NGCFile, XMPFile,
XCOFile, BDFile, TCLFile] XCOFile, BDFile, TCLFile]
CLEAN_TARGETS = {'clean': ["run.tcl", ".Xil",
"$(PROJECT).cache", "$(PROJECT).data",
"$(PROJECT).runs", "$(PROJECT).xpr"],
'mrproper': ["*.bit", "*.bin"]}
TCL_CONTROLS = {'windows_interpreter': 'vivado -mode tcl -source ',
'linux_interpreter': 'vivado -mode tcl -source ',
'open': 'open_project $(PROJECT).xpr',
'save': '',
'close': 'exit',
'synthesize': 'reset_run synth_1\n'
'launch_runs synth_1\n'
'wait_on_run synth_1',
'translate': '',
'map': '',
'par': 'reset_run impl_1\n'
'launch_runs impl_1\n'
'wait_on_run impl_1',
'bitstream':
'launch_runs impl_1 -to_step write_bitstream\n'
'wait_on_run impl_1',
'install_source': '$(PROJECT).runs/impl_1/$(SYN_TOP).bit'}
def __init__(self): def __init__(self):
super(ToolVivado, self).__init__() super(ToolVivado, self).__init__()
self.properties = [] self.properties = []
...@@ -64,71 +87,6 @@ class ToolVivado(ActionMakefile): ...@@ -64,71 +87,6 @@ class ToolVivado(ActionMakefile):
"""Get version from Xilinx Vivado binary program""" """Get version from Xilinx Vivado binary program"""
return 'unknown' return 'unknown'
def generate_synthesis_makefile(self, top_mod, tool_path):
"""Generate a synthesis Makefile for Xilinx Vivado"""
makefile_tmplt = string.Template("""PROJECT := ${project_name}
VIVADO_CRAP := \
run.tcl
#target for performing local synthesis
local: syn_pre_cmd synthesis syn_post_cmd
synthesis:
\t\techo "open_project $$(PROJECT).xpr" > run.tcl
\t\techo "reset_run synth_1" >> run.tcl
\t\techo "reset_run impl_1" >> run.tcl
\t\techo "launch_runs synth_1" >> run.tcl
\t\techo "wait_on_run synth_1" >> run.tcl
\t\techo "launch_runs impl_1" >> run.tcl
\t\techo "wait_on_run impl_1" >> run.tcl
\t\techo "launch_runs impl_1 -to_step write_bitstream" >> run.tcl
\t\techo "wait_on_run impl_1" >> run.tcl
\t\techo "exit" >> run.tcl
\t\t${vivado_sh_path} -mode tcl -source run.tcl
\t\tcp $$(PROJECT).runs/impl_1/${syn_top}.bit ${syn_top}.bit
syn_post_cmd:
\t\t${syn_post_cmd}
syn_pre_cmd:
\t\t${syn_pre_cmd}
#target for cleaning all intermediate stuff
clean:
\t\trm -f $$(PLANAHEAD_CRAP)
\t\trm -rf .Xil $$(PROJECT).cache $$(PROJECT).data $$(PROJECT).runs $$(PROJECT).xpr
#target for cleaning final files
mrproper:
\t\trm -f *.bit
.PHONY: mrproper clean syn_pre_cmd syn_post_cmd synthesis local
""")
if top_mod.manifest_dict["syn_pre_cmd"]:
syn_pre_cmd = top_mod.manifest_dict["syn_pre_cmd"]
else:
syn_pre_cmd = ''
if top_mod.manifest_dict["syn_post_cmd"]:
syn_post_cmd = top_mod.manifest_dict["syn_post_cmd"]
else:
syn_post_cmd = ''
makefile_text = makefile_tmplt.substitute(
syn_top=top_mod.manifest_dict["syn_top"],
project_name=top_mod.manifest_dict[
"syn_project"],
planahead_path=tool_path,
syn_pre_cmd=syn_pre_cmd,
syn_post_cmd=syn_post_cmd,
vivado_sh_path=os.path.join(tool_path, "vivado"))
self.write(makefile_text)
for file_aux in top_mod.incl_makefiles:
if os.path.exists(file_aux):
self.write("include %s\n" % file_aux)
def generate_synthesis_project( def generate_synthesis_project(
self, update=False, tool_version='', top_mod=None, fileset=None): self, update=False, tool_version='', top_mod=None, fileset=None):
"""Generate a Xilinx Vivado synthesis project""" """Generate a Xilinx Vivado synthesis project"""
......
hdlmake/util/path.py
View file @ 49d0aebd
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
from __future__ import print_function from __future__ import print_function
import os import os
import sys
import logging import logging
import platform import platform
...@@ -161,7 +162,8 @@ def flatten_list(sth): ...@@ -161,7 +162,8 @@ def flatten_list(sth):
def check_windows(): def check_windows():
if platform.system() == 'Windows': """Check if we are operating on a Windows filesystem"""
if platform.system() == 'Windows' or sys.platform == 'cygwin':
return True return True
else: else:
return False return False
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