Merge branch 'develop-vivado-worklib' into 'develop'

Vivado: Compile to --work <library> See merge request !26

Merge branch 'develop-vivado-worklib' into 'develop'
Vivado: Compile to --work <library> See merge request !26
e21f2439 · Tristan Gingold · b73be282 · 00bba9b7 · e21f2439
Commit e21f2439 authored Mar 23, 2023 by Tristan Gingold
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vivado_sim.py hdlmake/tools/vivado_sim.py +3 -1

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--- a/hdlmake/tools/vivado_sim.py
+++ b/hdlmake/tools/vivado_sim.py
@@ -50,7 +50,7 @@ class ToolVivadoSim(ToolXilinxProject, MakefileSim):
                     'mrproper': ["*.wdb", "*.vcd"]}

    SIMULATOR_CONTROLS = {'vlog': 'xvlog $<',
-                          'vhdl': 'xvhdl $<',
+                          'vhdl': 'xvhdl --work {work} $<',
                          'compiler': 'xelab -debug all $(TOP_MODULE) '
                                      '-s $(TOP_MODULE)'}

@@ -71,6 +71,8 @@ class ToolVivadoSim(ToolXilinxProject, MakefileSim):

    def _makefile_sim_compilation(self):
        """Generate compile simulation Makefile target for Vivado Simulator"""
+        libs = self.get_all_libs()
+        self._makefile_sim_libs_variables(libs)
        self.writeln("simulation: $(VERILOG_OBJ) $(VHDL_OBJ)")
        self.writeln("\t\t" + self.SIMULATOR_CONTROLS['compiler'])
        self.writeln()