final changes for the WB master interface for working with Etherbone

141d421f · Cesar Prados · 6b9861ee · 141d421f · 141d421f · 141d421f
Commit 141d421f authored Nov 04, 2013 by Cesar Prados
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Showing with 285 additions and 2 deletions

VME_Wb_master_eb.vhd hdl/VME_Wb_master_eb.vhd +281 -0

VME_bus.vhd hdl/VME_bus.vhd +2 -1

xvme64x_pack.vhd hdl/xvme64x_pack.vhd +2 -1

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--- a/hdl/VME_Wb_master_eb.vhd
+++ b/hdl/VME_Wb_master_eb.vhd
--- a/hdl/VME_bus.vhd
+++ b/hdl/VME_bus.vhd
@@ -1208,12 +1208,13 @@ with s_addressingType select
                                         rty_i           => rty_i,
                                         err_i           => err_i,
                                         cyc_o           => cyc_o,
-                                         memReq_o        => memReq_o,
+                                         stb_o           => memReq_o,
                                         WBdata_o        => wbData_o,
                                         wbData_i        => wbData_i,
                                         locAddr_o       => locAddr_o,
                                         memAckWB_i      => memAckWB_i,
                                         WbSel_o         => wbSel_o,
+                                         funct_sel       => s_func_sel,
                                         RW_o            => RW_o
                                        );
 													 

--- a/hdl/xvme64x_pack.vhd
+++ b/hdl/xvme64x_pack.vhd
@@ -764,10 +764,11 @@ function f_latchDS (clk_period : integer) return integer;
                        err_o           : out std_logic;
                        rty_o           : out std_logic;                 
                        cyc_o           : out std_logic;
-                        memReq_o        : out std_logic;
+                        stb_o           : out std_logic;
                        WBdata_o        : out std_logic_vector(g_wb_data_width - 1 downto 0);
                        locAddr_o       : out std_logic_vector(g_wb_addr_width - 1 downto 0);
                        WbSel_o         : out std_logic_vector(f_div8(g_wb_data_width) - 1 downto 0);
+                        funct_sel       : in   std_logic_vector (7 downto 0);
                        RW_o            : out std_logic
                     );
              end component VME_Wb_master;