Add ddr test testbench to repo.

Should be move to general core lib sometime.

sfpga_bootloader: removed unused VME pins from top level entity, referenced general-cores repo as a submodule

hdl/top/sfpga_bootloader: start up in passive mode (requires pullup->pulldown mod on SVEC V0), added IDR register value

hdl: directory structure cleanup (moved template top levels to top/templates), removed unused package dependency from svec_bootloader